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Searched refs:phl (Results 1 – 25 of 53) sorted by relevance

123

/external/curl/tests/libtest/
Dlib1526.c50 struct curl_slist *hhl = NULL, *phl = NULL, *tmp = NULL; in test() local
65 phl = curl_slist_append(phl, "User-Agent: Proxy Agent"); in test()
66 if(!hhl || !phl) { in test()
69 tmp = curl_slist_append(phl, "Expect:"); in test()
73 phl = tmp; in test()
78 test_setopt(curl, CURLOPT_PROXYHEADER, phl); in test()
98 curl_slist_free_all(phl); in test()
Dlib1528.c33 struct curl_slist *phl = NULL; in test() local
48 phl = curl_slist_append(phl, "Proxy-User-Agent: Http Agent2"); in test()
57 test_setopt(curl, CURLOPT_PROXYHEADER, phl); in test()
69 curl_slist_free_all(phl); in test()
/external/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s39 preceq.w.phl $1, $2 # CHECK: preceq.w.phl $1, $2 # encoding: [0x00,0x22,0x51,0x3c]
80 muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
88 …maq_s.w.phl $ac1, $2, $3 # CHECK: maq_s.w.phl $ac1, $2, $3 # encoding: [0x00,0x62,0x5a,0x7…
89 …maq_sa.w.phl $ac1, $2, $3 # CHECK: maq_sa.w.phl $ac1, $2, $3 # encoding: [0x00,0x62,0x7a,0x7…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s39 preceq.w.phl $1, $2 # CHECK: preceq.w.phl $1, $2 # encoding: [0x00,0x22,0x51,0x3c]
80 muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
88 …maq_s.w.phl $ac1, $2, $3 # CHECK: maq_s.w.phl $ac1, $2, $3 # encoding: [0x00,0x62,0x5a,0x7…
89 …maq_sa.w.phl $ac1, $2, $3 # CHECK: maq_sa.w.phl $ac1, $2, $3 # encoding: [0x00,0x62,0x7a,0x7…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/dsp/
Dvalid.s53 …maq_s.w.phl $ac2, $3, $4 # CHECK: maq_s.w.phl $ac2, $3, $4 # encoding: [0x7c,0x…
54 …maq_sa.w.phl $ac3, $5, $6 # CHECK: maq_sa.w.phl $ac3, $5, $6 # encoding: [0x7c,0x…
71 …muleq_s.w.phl $21, $22, $23 # CHECK: muleq_s.w.phl $21, $22, $23 # encoding: [0x7e,0x…
84 …preceq.w.phl $20, $21 # CHECK: preceq.w.phl $20, $21 # encoding: [0x7c,0x…
/external/llvm/test/MC/Mips/dsp/
Dvalid.s53 …maq_s.w.phl $ac2, $3, $4 # CHECK: maq_s.w.phl $ac2, $3, $4 # encoding: [0x7c,0x…
54 …maq_sa.w.phl $ac3, $5, $6 # CHECK: maq_sa.w.phl $ac3, $5, $6 # encoding: [0x7c,0x…
71 …muleq_s.w.phl $21, $22, $23 # CHECK: muleq_s.w.phl $21, $22, $23 # encoding: [0x7e,0x…
84 …preceq.w.phl $20, $21 # CHECK: preceq.w.phl $20, $21 # encoding: [0x7c,0x…
/external/llvm/test/MC/Mips/dspr2/
Dvalid.s75 …maq_s.w.phl $ac2, $3, $4 # CHECK: maq_s.w.phl $ac2, $3, $4 # encoding: [0x7c,0x64,0…
76 …maq_sa.w.phl $ac3, $5, $6 # CHECK: maq_sa.w.phl $ac3, $5, $6 # encoding: [0x7c,0xa6,0…
95 …muleq_s.w.phl $21, $22, $23 # CHECK: muleq_s.w.phl $21, $22, $23 # encoding: [0x7e,0xd7,0…
112 …preceq.w.phl $20,$21 # CHECK: preceq.w.phl $20, $21 # encoding: [0x7c,0x15,0…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/dspr2/
Dvalid.s75 …maq_s.w.phl $ac2, $3, $4 # CHECK: maq_s.w.phl $ac2, $3, $4 # encoding: [0x7c,0x64,0…
76 …maq_sa.w.phl $ac3, $5, $6 # CHECK: maq_sa.w.phl $ac3, $5, $6 # encoding: [0x7c,0xa6,0…
95 …muleq_s.w.phl $21, $22, $23 # CHECK: muleq_s.w.phl $21, $22, $23 # encoding: [0x7e,0xd7,0…
112 …preceq.w.phl $20,$21 # CHECK: preceq.w.phl $20, $21 # encoding: [0x7c,0x15,0…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt38 0x00 0x22 0x51 0x3c # CHECK: preceq.w.phl $1, $2
79 0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
87 0x00 0x62 0x5a 0x7c # CHECK: maq_s.w.phl $ac1, $2, $3
88 0x00 0x62 0x7a 0x7c # CHECK: maq_sa.w.phl $ac1, $2, $3
/external/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt38 0x00 0x22 0x51 0x3c # CHECK: preceq.w.phl $1, $2
79 0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
87 0x00 0x62 0x5a 0x7c # CHECK: maq_s.w.phl $ac1, $2, $3
88 0x00 0x62 0x7a 0x7c # CHECK: maq_sa.w.phl $ac1, $2, $3
/external/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt51 0x7c 0x64 0x15 0x30 # CHECK: maq_s.w.phl $ac2, $3, $4
52 0x7c 0xa6 0x1c 0x30 # CHECK: maq_sa.w.phl $ac3, $5, $6
69 0x7e 0xd7 0xaf 0x10 # CHECK: muleq_s.w.phl $21, $22, $23
82 0x7c 0x15 0xa3 0x12 # CHECK: preceq.w.phl $20, $21
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt51 0x7c 0x64 0x15 0x30 # CHECK: maq_s.w.phl $ac2, $3, $4
52 0x7c 0xa6 0x1c 0x30 # CHECK: maq_sa.w.phl $ac3, $5, $6
69 0x7e 0xd7 0xaf 0x10 # CHECK: muleq_s.w.phl $21, $22, $23
82 0x7c 0x15 0xa3 0x12 # CHECK: preceq.w.phl $20, $21
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips-dspr2/
Dvalid.s52 preceq.w.phl $1, $2 # CHECK: preceq.w.phl $1, $2 # encoding: [0x00,0x22,0x51,0x3c]
119 muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
/external/llvm/test/MC/Mips/micromips-dspr2/
Dvalid.s52 preceq.w.phl $1, $2 # CHECK: preceq.w.phl $1, $2 # encoding: [0x00,0x22,0x51,0x3c]
119 muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
/external/capstone/suite/MC/Mips/
Dmips-dsp-instructions.s.cs6 0x7c,0x15,0xa3,0x12 = preceq.w.phl $20, $21
/external/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt73 0x7c 0x64 0x15 0x30 # CHECK: maq_s.w.phl $ac2, $3, $4
74 0x7c 0xa6 0x1c 0x30 # CHECK: maq_sa.w.phl $ac3, $5, $6
93 0x7e 0xd7 0xaf 0x10 # CHECK: muleq_s.w.phl $21, $22, $23
110 0x7c 0x15 0xa3 0x12 # CHECK: preceq.w.phl $20, $21
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt73 0x7c 0x64 0x15 0x30 # CHECK: maq_s.w.phl $ac2, $3, $4
74 0x7c 0xa6 0x1c 0x30 # CHECK: maq_sa.w.phl $ac3, $5, $6
93 0x7e 0xd7 0xaf 0x10 # CHECK: muleq_s.w.phl $21, $22, $23
110 0x7c 0x15 0xa3 0x12 # CHECK: preceq.w.phl $20, $21
/external/llvm/test/CodeGen/Mips/
Ddsp-r1.ll218 ; CHECK: maq_s.w.phl
222 %3 = tail call i64 @llvm.mips.maq.s.w.phl(i64 %a0, <2 x i16> %1, <2 x i16> %2)
226 declare i64 @llvm.mips.maq.s.w.phl(i64, <2 x i16>, <2 x i16>) nounwind
242 ; CHECK: maq_sa.w.phl
246 %3 = tail call i64 @llvm.mips.maq.sa.w.phl(i64 %a0, <2 x i16> %1, <2 x i16> %2)
250 declare i64 @llvm.mips.maq.sa.w.phl(i64, <2 x i16>, <2 x i16>) nounwind
579 ; CHECK: muleq_s.w.phl
583 %2 = tail call i32 @llvm.mips.muleq.s.w.phl(<2 x i16> %0, <2 x i16> %1)
587 declare i32 @llvm.mips.muleq.s.w.phl(<2 x i16>, <2 x i16>) nounwind
1019 ; CHECK: preceq.w.phl
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Ddsp-r1.ll218 ; CHECK: maq_s.w.phl
222 %3 = tail call i64 @llvm.mips.maq.s.w.phl(i64 %a0, <2 x i16> %1, <2 x i16> %2)
226 declare i64 @llvm.mips.maq.s.w.phl(i64, <2 x i16>, <2 x i16>) nounwind
242 ; CHECK: maq_sa.w.phl
246 %3 = tail call i64 @llvm.mips.maq.sa.w.phl(i64 %a0, <2 x i16> %1, <2 x i16> %2)
250 declare i64 @llvm.mips.maq.sa.w.phl(i64, <2 x i16>, <2 x i16>) nounwind
579 ; CHECK: muleq_s.w.phl
583 %2 = tail call i32 @llvm.mips.muleq.s.w.phl(<2 x i16> %0, <2 x i16> %1)
587 declare i32 @llvm.mips.muleq.s.w.phl(<2 x i16>, <2 x i16>) nounwind
1019 ; CHECK: preceq.w.phl
[all …]
/external/llvm/test/MC/Mips/mips32r2/
Dinvalid-dsp.s46 …maq_s.w.phl $ac2,$25,$11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
48 …maq_sa.w.phl $ac3,$a1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
56 …muleq_s.w.phl $11,$s4,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/
Dinvalid-dsp.s46 …maq_s.w.phl $ac2,$25,$11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
48 …maq_sa.w.phl $ac3,$a1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
56 …muleq_s.w.phl $11,$s4,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td70 class PRECEQ_W_PHL_MM_ENC : POOL32A_2R_FMT<"preceq.w.phl", 0b0101000100>;
115 class MULEQ_S_W_PHL_MM_ENC : POOL32A_3RB0_FMT<"muleq_s.w.phl", 0b0000100101>;
136 class MAQ_S_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_s.w.phl", 0b01101001>;
137 class MAQ_SA_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_sa.w.phl", 0b11101001>;
196 "preceq.w.phl", int_mips_preceq_w_phl, NoItinerary, GPR32Opnd, DSPROpnd>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td70 class PRECEQ_W_PHL_MM_ENC : POOL32A_2R_FMT<"preceq.w.phl", 0b0101000100>;
115 class MULEQ_S_W_PHL_MM_ENC : POOL32A_3RB0_FMT<"muleq_s.w.phl", 0b0000100101>;
136 class MAQ_S_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_s.w.phl", 0b01101001>;
137 class MAQ_SA_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_sa.w.phl", 0b11101001>;
196 "preceq.w.phl", int_mips_preceq_w_phl, NoItinerary, GPR32Opnd, DSPROpnd>;
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips-dspr2/
Dvalid.txt51 0x00 0x22 0x51 0x3c # CHECK: preceq.w.phl $1, $2
118 0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/
Dvalid.txt51 0x00 0x22 0x51 0x3c # CHECK: preceq.w.phl $1, $2
118 0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3

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