/external/llvm/docs/ |
D | HowToUseInstrMappings.rst | 65 takes a non-predicated instruction and returns its predicated true or false form 67 to define a relationship model that relates predicated instructions to their 68 non-predicated form by assigning appropriate values to the ``InstrMapping`` 69 fields. For this relationship, non-predicated instructions are treated as key 82 // For example, if we want to relate 'ADD' (non-predicated) with 'Add_pt' 83 // (predicated true) and 'Add_pf' (predicated false), then all 3 95 // attribute of the key (non-predicated) and column (true/false) 99 // The key column contains non-predicated instructions. 108 non-predicated instructions with their predicated forms. It also outputs the 113 predicated form of the instruction, if found in the relation table.
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | HowToUseInstrMappings.rst | 65 takes a non-predicated instruction and returns its predicated true or false form 67 to define a relationship model that relates predicated instructions to their 68 non-predicated form by assigning appropriate values to the ``InstrMapping`` 69 fields. For this relationship, non-predicated instructions are treated as key 82 // For example, if we want to relate 'ADD' (non-predicated) with 'Add_pt' 83 // (predicated true) and 'Add_pf' (predicated false), then all 3 95 // attribute of the key (non-predicated) and column (true/false) 99 // The key column contains non-predicated instructions. 108 non-predicated instructions with their predicated forms. It also outputs the 113 predicated form of the instruction, if found in the relation table.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/ |
D | new-value-check.s | 9 # invalid: r0 definition predicated on the opposite condition 25 # CHECK-STRICT: :28:3: note: Register producer is predicated and consumer is unconditional 40 # CHECK-STRICT: :43:3: note: Register producer is predicated and consumer is unconditional 58 # valid: r0 definition and use identically predicated
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopSimplify/ |
D | preserve-scev.ll | 17 ; CHECK: Loop %for.body18: Unpredictable predicated backedge-taken count. 20 ; CHECK: Loop %for.cond: Unpredictable predicated backedge-taken count. 29 ; CHECK: Loop %for.body18: Unpredictable predicated backedge-taken count. 32 ; CHECK: Loop %for.cond: Unpredictable predicated backedge-taken count. 35 ; CHECK: Loop %for.cond.outer: Unpredictable predicated backedge-taken count. 86 ; CHECK: Loop %while.cond191: Unpredictable predicated backedge-taken count. 89 ; CHECK: Loop %while.cond191.outer: Unpredictable predicated backedge-taken count. 99 ; CHECK: Loop %while.cond191.outer: Unpredictable predicated backedge-taken count.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/AArch64/ |
D | predication_costs.ll | 14 ; This test checks that we correctly compute the cost of the predicated udiv 55 ; This test checks that we correctly compute the cost of the predicated store 91 ; This test checks that we correctly compute the cost of the predicated udiv 93 ; inside the predicated block. If we assume the block probability is 50%, we 136 ; This test checks that we correctly compute the cost of the predicated store 138 ; inside the predicated block. If we assume the block probability is 50%, we 177 ; This test checks that we correctly compute the cost of multiple predicated 179 ; and predicated. The sub feeding the store is scalarized and sunk inside the 180 ; store's predicated block. However, the add feeding the sdiv and udiv cannot
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/external/llvm/test/Analysis/ScalarEvolution/ |
D | predicated-trip-count.ll | 17 ; throughout the execution of the loop. The resulting predicated 51 ; The predicated backedge taken count is: 57 ; The predicated backedge taken count is 0. 65 ; The predicated backedge taken count is 1 + (zext i16 %Start to i32) - %M 67 ; If %M >= MIN_INT + 1, this predicated backedge taken count would be correct (even
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/ScalarEvolution/ |
D | predicated-trip-count.ll | 17 ; throughout the execution of the loop. The resulting predicated 51 ; The predicated backedge taken count is: 57 ; The predicated backedge taken count is 0. 65 ; The predicated backedge taken count is 1 + (zext i16 %Start to i32) - %M 67 ; If %M >= MIN_INT + 1, this predicated backedge taken count would be correct (even
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
D | branch-folder-hoist-kills.mir | 11 # then created code, where the first predicated instruction has incorrect 18 # %r0 = C2_cmoveit %P0, 2, implicit %r0 ; predicated A2_tfrsi 19 # %r0 = C2_cmoveif killed %P0, 1, implicit %r0 ; predicated A2_tfrsi
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D | ifcvt-live-subreg.mir | 2 # Check that an implicit use is generated for a predicated instruction 7 # Verify the predicated block:
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D | ifcvt-impuse-livein.mir | 3 # Make sure that the necessary implicit uses are added to predicated
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D | livephysregs-add-pristines.mir | 4 # an implicit use of r23 to the predicated redefinition:
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/external/llvm/lib/Target/Hexagon/ |
D | Hexagon.td | 58 // PredRel - Filter class used to relate non-predicated instructions with their 59 // predicated forms. 61 // PredNewRel - Filter class used to relate predicated instructions with their 77 // predicated formats - true and false. 117 // Generate mapping table to relate predicated instructions with their .new 129 // Generate mapping table to relate .new predicated instructions with their old
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | Hexagon.td | 93 // PredRel - Filter class used to relate non-predicated instructions with their 94 // predicated forms. 96 // PredNewRel - Filter class used to relate predicated instructions with their 110 // predicated formats - true and false. 150 // Generate mapping table to relate predicated instructions with their .new 162 // Generate mapping table to relate .new predicated instructions with their old
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/external/swiftshader/third_party/SPIRV-Tools/source/opt/ |
D | merge_return_pass.cpp | 138 std::unordered_set<BasicBlock*> predicated; in ProcessStructured() local 153 if (!PredicateBlocks(block, &predicated, &order)) { in ProcessStructured() 334 BasicBlock* return_block, std::unordered_set<BasicBlock*>* predicated, in PredicateBlocks() argument 339 if (predicated->count(return_block)) { in PredicateBlocks() 365 if (!predicated->insert(block).second) break; in PredicateBlocks() 374 if (!BreakFromConstruct(block, predicated, order, break_merge_inst)) { in PredicateBlocks() 383 BasicBlock* block, std::unordered_set<BasicBlock*>* predicated, in BreakFromConstruct() argument 423 predicated->insert(old_body); in BreakFromConstruct()
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/external/angle/third_party/spirv-tools/src/source/opt/ |
D | merge_return_pass.cpp | 138 std::unordered_set<BasicBlock*> predicated; in ProcessStructured() local 153 if (!PredicateBlocks(block, &predicated, &order)) { in ProcessStructured() 334 BasicBlock* return_block, std::unordered_set<BasicBlock*>* predicated, in PredicateBlocks() argument 339 if (predicated->count(return_block)) { in PredicateBlocks() 365 if (!predicated->insert(block).second) break; in PredicateBlocks() 374 if (!BreakFromConstruct(block, predicated, order, break_merge_inst)) { in PredicateBlocks() 383 BasicBlock* block, std::unordered_set<BasicBlock*>* predicated, in BreakFromConstruct() argument 423 predicated->insert(old_body); in BreakFromConstruct()
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/external/deqp-deps/SPIRV-Tools/source/opt/ |
D | merge_return_pass.cpp | 138 std::unordered_set<BasicBlock*> predicated; in ProcessStructured() local 153 if (!PredicateBlocks(block, &predicated, &order)) { in ProcessStructured() 334 BasicBlock* return_block, std::unordered_set<BasicBlock*>* predicated, in PredicateBlocks() argument 339 if (predicated->count(return_block)) { in PredicateBlocks() 365 if (!predicated->insert(block).second) break; in PredicateBlocks() 374 if (!BreakFromConstruct(block, predicated, order, break_merge_inst)) { in PredicateBlocks() 383 BasicBlock* block, std::unordered_set<BasicBlock*>* predicated, in BreakFromConstruct() argument 423 predicated->insert(old_body); in BreakFromConstruct()
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/external/llvm/test/MC/Hexagon/ |
D | new-value-check.s | 9 # invalid: r0 definition predicated on the opposite condition 61 # valid: r0 definition and use identically predicated
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ELF/ARM/ |
D | lit.local.cfg | 2 # predicated on 'X86'.
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/external/llvm/test/MC/ELF/ARM/ |
D | lit.local.cfg | 2 # predicated on 'X86'.
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/external/mesa3d/src/freedreno/ir3/ |
D | ir3_sched.c | 797 struct ir3_instruction *predicated = ir->predicates[i]; in split_pred() local 800 if (is_scheduled(predicated)) in split_pred() 809 if (ssa(predicated->regs[1]) == ctx->pred) { in split_pred() 815 predicated->regs[1]->instr = new_pred; in split_pred() 819 sched_node_add_dep(predicated, new_pred, 0); in split_pred() 820 di(predicated, "new predicate"); in split_pred()
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/HistoricalNotes/ |
D | 2001-02-09-AdveCommentsResponse.txt | 39 implementation may choose altermate representations (such as predicated 148 > predicated instructions 150 Conditional move is effectly a special case of a predicated 151 instruction... and I think that all predicated instructions can possibly 155 tend to prefer that a predicated architecture like IA64 convert from a 156 "basic block" representation to a predicated rep as part of it's dynamic
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/external/llvm/docs/HistoricalNotes/ |
D | 2001-02-09-AdveCommentsResponse.txt | 39 implementation may choose altermate representations (such as predicated 148 > predicated instructions 150 Conditional move is effectly a special case of a predicated 151 instruction... and I think that all predicated instructions can possibly 155 tend to prefer that a predicated architecture like IA64 convert from a 156 "basic block" representation to a predicated rep as part of it's dynamic
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/external/mesa3d/src/gallium/drivers/iris/ |
D | iris_screen.h | 86 bool predicated); 89 bool predicated);
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | implicit-it.s | 28 @ THUMB-STDERR: error: predicated instructions must be in IT block 29 @ ARM-STDERR: warning: predicated instructions should be in IT block
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/X86/ |
D | x86-predication.ll | 9 ; This test ensures that we don't scalarize the predicated load. Since the load 65 ; sink-scalar-operands optimization for predicated instructions.
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