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Searched refs:prediv (Results 1 – 9 of 9) sorted by relevance

/external/u-boot/drivers/video/rockchip/
Drk_mipi.c202 u64 prediv = 1; in rk_mipi_phy_enable() local
275 prediv = i; in rk_mipi_phy_enable()
279 fbdiv = ddr_clk * prediv / refclk; in rk_mipi_phy_enable()
280 ddr_clk = refclk * fbdiv / prediv; in rk_mipi_phy_enable()
284 __func__, refclk, prediv, fbdiv, ddr_clk); in rk_mipi_phy_enable()
287 test_data[0] = prediv - 1; in rk_mipi_phy_enable()
/external/u-boot/arch/arm/mach-davinci/include/mach/
Ddm365_lowlevel.h16 int dm365_pll1_init(unsigned long pllmult, unsigned long prediv);
17 int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
Dpll_defs.h19 unsigned int prediv; /* 0x114 */ member
Dhardware.h205 dv_reg prediv; member
/external/u-boot/arch/arm/mach-keystone/
Dclock.c281 unsigned long mult = 1, prediv = 1, output_div = 2; in pll_freq_get() local
290 prediv = (tmp & CFG_PLLCTL0_PLLD_MASK) + 1; in pll_freq_get()
299 ret = ret / prediv / output_div * mult; in pll_freq_get()
331 prediv = (tmp & CFG_PLLCTL0_PLLD_MASK) + 1; in pll_freq_get()
336 ret = ((ret / prediv) * mult) / output_div; in pll_freq_get()
/external/u-boot/drivers/clk/renesas/
Dclk-rcar-gen3.c163 u32 value, mult, div, prediv, postdiv; in gen3_clk_get_rate64() local
293 prediv = (value >> CPG_RPC_PREDIV_OFFSET) & in gen3_clk_get_rate64()
295 if (prediv == 2) in gen3_clk_get_rate64()
297 else if (prediv == 3) in gen3_clk_get_rate64()
308 core->parent, prediv, postdiv, rate); in gen3_clk_get_rate64()
/external/u-boot/drivers/clk/imx/
Dclk-composite-8m.c57 int *prediv, int *postdiv) in imx8m_clk_composite_compute_dividers() argument
63 *prediv = 1; in imx8m_clk_composite_compute_dividers()
71 *prediv = div1; in imx8m_clk_composite_compute_dividers()
/external/u-boot/arch/arm/mach-keystone/include/mach/
Dclock_defs.h20 u32 prediv; /* 14 */ member
/external/u-boot/arch/arm/mach-davinci/
Dda850_lowlevel.c85 &reg->prediv); in da850_pll_init()