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Searched refs:prefetch_L2_mask (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_cp_dma.c435 unsigned mask = sctx->prefetch_L2_mask; in cik_emit_prefetch_L2()
447 sctx->prefetch_L2_mask &= ~(SI_PREFETCH_HS | SI_PREFETCH_VBO_DESCRIPTORS); in cik_emit_prefetch_L2()
461 sctx->prefetch_L2_mask &= ~(SI_PREFETCH_GS | SI_PREFETCH_VBO_DESCRIPTORS); in cik_emit_prefetch_L2()
473 sctx->prefetch_L2_mask &= ~(SI_PREFETCH_VS | SI_PREFETCH_VBO_DESCRIPTORS); in cik_emit_prefetch_L2()
486 sctx->prefetch_L2_mask &= ~(SI_PREFETCH_LS | SI_PREFETCH_VBO_DESCRIPTORS); in cik_emit_prefetch_L2()
504 sctx->prefetch_L2_mask &= ~(SI_PREFETCH_ES | SI_PREFETCH_VBO_DESCRIPTORS); in cik_emit_prefetch_L2()
518 sctx->prefetch_L2_mask &= ~(SI_PREFETCH_VS | SI_PREFETCH_VBO_DESCRIPTORS); in cik_emit_prefetch_L2()
527 sctx->prefetch_L2_mask = 0; in cik_emit_prefetch_L2()
Dsi_gfx_cs.c472 ctx->prefetch_L2_mask |= SI_PREFETCH_LS; in si_begin_new_gfx_cs()
474 ctx->prefetch_L2_mask |= SI_PREFETCH_HS; in si_begin_new_gfx_cs()
476 ctx->prefetch_L2_mask |= SI_PREFETCH_ES; in si_begin_new_gfx_cs()
478 ctx->prefetch_L2_mask |= SI_PREFETCH_GS; in si_begin_new_gfx_cs()
480 ctx->prefetch_L2_mask |= SI_PREFETCH_VS; in si_begin_new_gfx_cs()
482 ctx->prefetch_L2_mask |= SI_PREFETCH_PS; in si_begin_new_gfx_cs()
484 ctx->prefetch_L2_mask |= SI_PREFETCH_VBO_DESCRIPTORS; in si_begin_new_gfx_cs()
Dsi_state_shaders.c4085 sctx->prefetch_L2_mask |= SI_PREFETCH_LS; in si_update_shaders()
4087 sctx->prefetch_L2_mask &= ~SI_PREFETCH_LS; in si_update_shaders()
4090 sctx->prefetch_L2_mask |= SI_PREFETCH_HS; in si_update_shaders()
4092 sctx->prefetch_L2_mask &= ~SI_PREFETCH_HS; in si_update_shaders()
4095 sctx->prefetch_L2_mask |= SI_PREFETCH_ES; in si_update_shaders()
4097 sctx->prefetch_L2_mask &= ~SI_PREFETCH_ES; in si_update_shaders()
4100 sctx->prefetch_L2_mask |= SI_PREFETCH_GS; in si_update_shaders()
4102 sctx->prefetch_L2_mask &= ~SI_PREFETCH_GS; in si_update_shaders()
4105 sctx->prefetch_L2_mask |= SI_PREFETCH_VS; in si_update_shaders()
4107 sctx->prefetch_L2_mask &= ~SI_PREFETCH_VS; in si_update_shaders()
[all …]
Dsi_state_draw.c1486 sctx->prefetch_L2_mask |= SI_PREFETCH_VBO_DESCRIPTORS; in si_upload_vertex_buffer_descriptors()
1490 sctx->prefetch_L2_mask &= ~SI_PREFETCH_VBO_DESCRIPTORS; in si_upload_vertex_buffer_descriptors()
2185 if (sctx->chip_class >= GFX7 && sctx->prefetch_L2_mask) in si_multi_draw_vbo()
2195 if (sctx->chip_class >= GFX7 && sctx->prefetch_L2_mask) in si_multi_draw_vbo()
2214 if (sctx->chip_class >= GFX7 && sctx->prefetch_L2_mask) in si_multi_draw_vbo()
Dsi_pipe.h956 uint16_t prefetch_L2_mask; member
/external/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c1029 uint32_t mask = state->prefetch_L2_mask; in radv_emit_prefetch_L2()
1034 mask = state->prefetch_L2_mask & (RADV_PREFETCH_VS | in radv_emit_prefetch_L2()
1064 state->prefetch_L2_mask &= ~mask; in radv_emit_prefetch_L2()
2837 cmd_buffer->state.prefetch_L2_mask |= RADV_PREFETCH_VBO_DESCRIPTORS; in radv_flush_vertex_descriptors()
4255 cmd_buffer->state.prefetch_L2_mask |= RADV_PREFETCH_SHADERS; in radv_CmdBindPipeline()
5400 if (has_prefetch && cmd_buffer->state.prefetch_L2_mask) { in radv_draw()
5410 if (has_prefetch && cmd_buffer->state.prefetch_L2_mask) { in radv_draw()
5426 if (has_prefetch && cmd_buffer->state.prefetch_L2_mask) { in radv_draw()
Dradv_private.h1331 uint32_t prefetch_L2_mask; member