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Searched refs:prefx (Results 1 – 19 of 19) sorted by relevance

/external/llvm/test/MC/Mips/
Dmicromips-control-instructions.s44 # CHECK-EL: prefx 1, $3($5) # encoding: [0x65,0x54,0xa0,0x09]
86 # CHECK-EB: prefx 1, $3($5) # encoding: [0x54,0x65,0x09,0xa0]
123 prefx 1, $3($5)
Dmicromips-invalid.s80 prefx -1, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
81 prefx 32, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmicromips-control-instructions.s53 # CHECK-EL: prefx 1, $3($5) # encoding: [0x65,0x54,0xa0,0x09]
87 # CHECK-EB: prefx 1, $3($5) # encoding: [0x54,0x65,0x09,0xa0]
116 prefx 1, $3($5)
Dmicromips-invalid.s80 prefx -1, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
81 prefx 32, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips4.s14prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips4.s14prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips4.s17prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/google-breakpad/src/third_party/libdisasm/
DTODO37 if ( prefx) only use if insn != invalid
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips4.s17prefx 0,$2($31) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/u-boot/arch/mips/include/asm/
Dasm.h167 prefx hint, addr; \
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/
Dvalid.s287 prefx 1, $3($5) # CHECK: prefx 1, $3($5) # encoding: [0x54,0x65,0x09,0xa0] label
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid.txt175 0x54 0x65 0x09 0xa0 # CHECK: prefx 1, $3($5)
Dvalid-el.txt175 0x65 0x54 0xa0 0x09 # CHECK: prefx 1, $3($5)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt192 0x65 0x54 0xa0 0x09 # CHECK: prefx 1, $3($5)
Dvalid.txt192 0x54 0x65 0x09 0xa0 # CHECK: prefx 1, $3($5)
/external/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td969 def PREFX_MM : PrefetchIndexed<"prefx">, POOL32F_PREFX_FM_MM<0x15, 0x1A0>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td1115 def PREFX_MM : PrefetchIndexed<"prefx">, POOL32F_PREFX_FM_MM<0x15, 0x1A0>,
DMipsInstrInfo.td2519 // FIXME: We are missing the prefx instruction.
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4982 ".ph.w\017precrqu_s.qb.ph\004pref\005prefe\005prefx\007prepend\nraddu.w."
7042 …{ 7603 /* prefx */, Mips::PREFX_MM, Convert__GPR32AsmReg1_3__GPR32AsmReg1_1__ConstantUImm5_01_0, F…
10460 { Feature_InMicroMips|Feature_NotMips32r6, 7603 /* prefx */, MCK_GPR32AsmReg, 10 /* 1, 3 */ },