| /external/llvm/test/CodeGen/ARM/ |
| D | sat-arith.ll | 4 ; CHECK-LABEL: qadd
5 define i32 @qadd() nounwind {
8 ; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
9 ; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
10 %tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
19 ; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
60 declare i32 @llvm.arm.qadd(i32, i32) nounwind
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics-v5.ll | 67 define i32 @qadd(i32 %a, i32 %b) nounwind {
68 ; CHECK-LABEL: qadd
69 ; CHECK: qadd r0, r0, r1
70 %tmp = call i32 @llvm.arm.qadd(i32 %a, i32 %b)
84 %dbl = call i32 @llvm.arm.qadd(i32 %a, i32 %a)
85 %add = call i32 @llvm.arm.qadd(i32 %dbl, i32 %b)
92 %dbl = call i32 @llvm.arm.qadd(i32 %b, i32 %b)
109 declare i32 @llvm.arm.qadd(i32, i32) nounwind
|
| /external/arm-neon-tests/ |
| D | ref_dsp.c | 61 sres = qadd(svar1, svar2); in exec_dsp()
67 sres = qadd(svar1, svar2); in exec_dsp()
73 sres = qadd(svar1, svar2); in exec_dsp()
79 sres = qadd(svar1, svar2); in exec_dsp()
85 sres = qadd(svar1, svar2); in exec_dsp()
91 sres = qadd(svar1, svar2); in exec_dsp()
97 sres = qadd(svar1, svar2); in exec_dsp()
|
| D | ref-rvct-all.txt | 7973 qadd(0x1, 0x2) = 0x3 sat 0
7974 qadd(0xffffffff, 0xfffffffe) = 0xfffffffd sat 0
7975 qadd(0xffffffff, 0x2) = 0x1 sat 0
7976 qadd(0x7000, 0x7000) = 0xe000 sat 0
7977 qadd(0x8fff, 0x8fff) = 0x11ffe sat 0
7978 qadd(0x70000000, 0x70000000) = 0x7fffffff sat 1
7979 qadd(0x8fffffff, 0x8fffffff) = 0x80000000 sat 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | invalid-instructions-spellcheck.s | 34 @ and 'qadd' a distance of 2 (a deletion and an insertion)
57 @ For example, in Thumb mode we don't want to see suggestions 'faddd' of 'qadd'
|
| D | basic-thumb2-instructions.s | 1902 qadd r1, r2, r3
1910 @ CHECK: qadd r1, r2, r3 @ encoding: [0x83,0xfa,0x82,0xf1]
|
| D | basic-arm-instructions.s | 1789 qadd r1, r2, r3
1796 @ CHECK: qadd r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1]
|
| /external/boringssl/src/crypto/fipsmodule/bn/ |
| D | prime.c | 997 BIGNUM *t1, *qadd, *q; in probable_prime_dh_safe() local
1003 qadd = BN_CTX_get(ctx); in probable_prime_dh_safe()
1004 if (qadd == NULL) { in probable_prime_dh_safe()
1008 if (!BN_rshift1(qadd, padd)) { in probable_prime_dh_safe()
1017 if (!BN_mod(t1, q, qadd, ctx)) { in probable_prime_dh_safe()
1057 if (!BN_add(q, q, qadd)) { in probable_prime_dh_safe()
|
| /external/libopus/m4/ |
| D | as-gcc-inline-assembly.m4 | 82 AC_COMPILE_IFELSE([AC_LANG_PROGRAM([],[__asm__("qadd r3,r3,r3")])],
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 105 M(qadd) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 106 M(qadd) \
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 490 0x52,0x10,0x03,0xe1 = qadd r1, r2, r3
|
| D | basic-thumb2-instructions.s.cs | 584 0x83,0xfa,0x82,0xf1 = qadd r1, r2, r3
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2824 void qadd(Condition cond, Register rd, Register rm, Register rn);
2825 void qadd(Register rd, Register rm, Register rn) { qadd(al, rd, rm, rn); } in qadd() function
|
| D | disasm-aarch32.h | 988 void qadd(Condition cond, Register rd, Register rm, Register rn);
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1787 qadd r1, r2, r3
1794 @ CHECK: qadd r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1]
|
| D | basic-thumb2-instructions.s | 1854 qadd r1, r2, r3
1862 @ CHECK: qadd r1, r2, r3 @ encoding: [0x83,0xfa,0x82,0xf1]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1133 # CHECK: qadd r1, r2, r3
|
| D | thumb2.txt | 1366 # CHECK: qadd r1, r2, r3
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1366 # CHECK: qadd r1, r2, r3
|
| D | basic-arm-instructions.txt | 1133 # CHECK: qadd r1, r2, r3
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2135 def t2QADD : T2I_pam<0b000, 0b1000, "qadd",
|
| D | ARMInstrInfo.td | 3560 def QADD : AAI<0b00010000, 0b00000101, "qadd",
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2212 def t2QADD : T2I_pam_intrinsics_rev<0b000, 0b1000, "qadd">;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 7747 "pkhbt\005pkhtb\003pld\004pldw\003pli\003pop\004push\004qadd\006qadd16\005"
8525 …{ 677 /* qadd */, ARM::t2QADD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feat…
8526 …{ 677 /* qadd */, ARM::QADD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_Co…
|