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Searched refs:rddsp (Results 1 – 25 of 30) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dadd-dsp.ll30 ; DSP-NEXT: rddsp $2, 1
37 ; DSP-NEXT: rddsp $2, 1
54 ; MMDSP-NEXT: rddsp $2, 1
61 ; MMDSP-NEXT: rddsp $2, 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/dsp/
Dinvalid.s36 rddsp $2, -1 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
37 rddsp $2, 1024 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
Dvalid.s99 …rddsp $5, 256 # CHECK: rddsp $5, 256 # encoding: [0x7d,0x…
/external/llvm/test/MC/Mips/dsp/
Dinvalid.s36 rddsp $2, -1 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
37 rddsp $2, 1024 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
Dvalid.s99 …rddsp $5, 256 # CHECK: rddsp $5, 256 # encoding: [0x7d,0x…
/external/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s97 rddsp $1, 2 # CHECK: rddsp $1, 2 # encoding: [0x00,0x20,0x86,0x7c]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s97 rddsp $1, 2 # CHECK: rddsp $1, 2 # encoding: [0x00,0x20,0x86,0x7c]
/external/llvm/test/CodeGen/Mips/
Ddsp-r1.ll661 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
667 declare i32 @llvm.mips.rddsp(i32) nounwind readonly
676 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
689 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
738 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
751 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
764 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
1230 ; CHECK: rddsp ${{[0-9]+}}
1233 %0 = tail call i32 @llvm.mips.rddsp(i32 31)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Ddsp-r1.ll661 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
667 declare i32 @llvm.mips.rddsp(i32) nounwind readonly
676 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
689 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
738 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
751 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
764 %2 = tail call i32 @llvm.mips.rddsp(i32 31)
1240 ; CHECK: rddsp ${{[0-9]+}}
1243 %0 = tail call i32 @llvm.mips.rddsp(i32 31)
/external/llvm/test/MC/Mips/dspr2/
Dvalid.s133 …rddsp $5, 256 # CHECK: rddsp $5, 256 # encoding: [0x7d,0x00,0…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/dspr2/
Dvalid.s133 …rddsp $5, 256 # CHECK: rddsp $5, 256 # encoding: [0x7d,0x00,0…
/external/u-boot/arch/mips/include/asm/
Dmipsregs.h1484 #define rddsp(mask) \ macro
1697 #define rddsp(mask) \ macro
1784 #define rddsp(mask) \ macro
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt96 0x00 0x20 0x86 0x7c # CHECK: rddsp $1, 2
/external/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt96 0x00 0x20 0x86 0x7c # CHECK: rddsp $1, 2
/external/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt97 0x7d 0x00 0x2c 0xb8 # CHECK: rddsp $5, 256
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt97 0x7d 0x00 0x2c 0xb8 # CHECK: rddsp $5, 256
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td146 class RDDSP_MM_ENC : POOL32A_1RMASK7_FMT<"rddsp", 0b00011001>;
363 string AsmString = !strconcat("rddsp", "\t$rt, $mask");
DMipsDSPInstrInfo.td929 class RDDSP_DESC : RDDSP_DESC_BASE<"rddsp", int_mips_rddsp, NoItinerary>;
/external/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt131 0x7d 0x00 0x2c 0xb8 # CHECK: rddsp $5, 256
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt131 0x7d 0x00 0x2c 0xb8 # CHECK: rddsp $5, 256
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td146 class RDDSP_MM_ENC : POOL32A_1RMASK7_FMT<"rddsp", 0b00011001>;
363 string AsmString = !strconcat("rddsp", "\t$rt, $mask");
DMipsDSPInstrInfo.td934 class RDDSP_DESC : RDDSP_DESC_BASE<"rddsp", int_mips_rddsp, NoItinerary>;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4983 "qb\005rddsp\005rdhwr\006rdpgpr\007recip.d\007recip.s\003rem\004remu\007"
7047 …{ 7628 /* rddsp */, Mips::RDDSP_MM, Convert__GPR32AsmReg1_0__ConstantUImm7_01_1, Feature_InMicroMi…
7048 …{ 7628 /* rddsp */, Mips::RDDSP, Convert__GPR32AsmReg1_0__ConstantUImm10_01_1, Feature_HasDSP, { M…
10465 { Feature_InMicroMips|Feature_HasDSP, 7628 /* rddsp */, MCK_GPR32AsmReg, 1 /* 0 */ },
10466 { Feature_HasDSP, 7628 /* rddsp */, MCK_GPR32AsmReg, 1 /* 0 */ },
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc3487 mips_rddsp, // llvm.mips.rddsp
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen2722 mips_rddsp, // llvm.mips.rddsp
8746 "llvm.mips.rddsp",
16631 13, // llvm.mips.rddsp

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