Searched refs:readl_be (Results 1 – 9 of 9) sorted by relevance
94 val = readl_be(priv->regs); in bmips_short_cpu_desc()110 val = readl_be(priv->regs); in bmips_long_cpu_desc()128 mips_pll_fcvo = readl_be(priv->regs + REG_BCM6318_STRAP_OVRDBUS); in bcm6318_get_cpu_freq()150 mips_pll_fcvo = readl_be(priv->regs + REG_BCM6328_MISC_STRAPBUS); in bcm6328_get_cpu_freq()182 tmp = readl_be(priv->regs + REG_BCM6348_PERF_MIPSPLLCFG); in bcm6348_get_cpu_freq()194 tmp = readl_be(priv->regs + REG_BCM6358_DDR_DMIPSPLLCFG); in bcm6358_get_cpu_freq()206 mips_pll_fcvo = readl_be(priv->regs + REG_BCM6362_MISC_STRAPBUS); in bcm6362_get_cpu_freq()244 tmp = readl_be(priv->regs + REG_BCM6368_DDR_DMIPSPLLCFG); in bcm6368_get_cpu_freq()250 tmp = readl_be(priv->regs + REG_BCM6368_DDR_DMIPSPLLDIV); in bcm6368_get_cpu_freq()260 mips_pll_fcvo = readl_be(priv->regs + REG_BCM63268_MISC_STRAPBUS); in bcm63268_get_cpu_freq()[all …]
54 val = readl_be(priv->regs + SDRAM_CFG_REG); in bcm6318_get_ram_size()62 return readl_be(priv->regs + DDR_CSEND_REG) << 24; in bcm6328_get_ram_size()80 val = readl_be(priv->regs + SDRAM_CFG_REG); in bcm6338_get_ram_size()94 val = readl_be(priv->regs + MEMC_CFG_REG); in bcm6358_get_ram_size()
81 #ifdef readl_be82 BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
42 while (readl_be(regs + LED_CTRL_REG) & LED_CTRL_BUSY_MASK) in bcm6358_led_busy()50 return (readl_be(priv->regs + LED_MODE_REG) >> priv->pin) & in bcm6358_led_get_mode()
49 return ((readl_be(priv->mode) >> priv->shift) & LED_MODE_MASK); in bcm6328_led_get_mode()
270 if (readl_be(priv->base + ETH_CTL_REG) & ETH_CTL_ENABLE_MASK) in bcm6348_eth_write_hwaddr()335 val = readl_be(base + MII_DAT_REG) & MII_DAT_DATA_MASK; in bcm6348_mdio_read()
168 cfg = readl_be(priv->chan + DMAC_CFG_REG(ch)); in bcm6348_iudma_chan_stop()465 cfg = readl_be(priv->chan + DMAC_CFG_REG(dma->id)); in bcm6348_iudma_free_rcv_buf()
289 #define readl_be(addr) \ macro
374 #define readl_be(addr) \ in BUILDIO_MEM() macro