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Searched refs:regclass_begin (Results 1 – 10 of 10) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/
DMCRegisterInfo.h427 regclass_iterator regclass_begin() const { return Classes; } in regclass_begin() function
430 return make_range(regclass_begin(), regclass_end()); in regclasses()
434 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h677 regclass_iterator regclass_begin() const { return RegClassBegin; } in regclass_begin() function
680 return make_range(regclass_begin(), regclass_end()); in regclasses()
684 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm/lib/CodeGen/
DTargetRegisterInfo.cpp134 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ in getMinimalPhysRegClass()
164 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), in getAllocatableSet()
DRegisterClassInfo.cpp160 RI = TRI->regclass_begin(), RE = TRI->regclass_end(); RI != RE; ++RI) { in computePSetLimit()
/external/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp60 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in ResourcePriorityQueue()
367 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in regPressureDelta()
374 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in regPressureDelta()
DScheduleDAGRRList.cpp1662 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in RegReductionPQBase()
1930 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in dumpRegPressure()
DTargetLowering.cpp2357 for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(), in getRegForInlineAsmConstraint()
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h408 regclass_iterator regclass_begin() const { return Classes; } in regclass_begin() function
412 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h640 regclass_iterator regclass_begin() const { return RegClassBegin; } in regclass_begin() function
644 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm/lib/Target/Hexagon/
DHexagonBlockRanges.cpp233 for (auto I = TRI.regclass_begin(), E = TRI.regclass_end(); I != E; ++I) { in HexagonBlockRanges()