Searched refs:regoffset (Results 1 – 11 of 11) sorted by relevance
/external/vixl/src/aarch64/ |
D | operands-aarch64.cc | 395 Register regoffset, in MemOperand() argument 399 regoffset_(regoffset), in MemOperand() 406 VIXL_ASSERT(!regoffset.IsSP()); in MemOperand() 410 VIXL_ASSERT(regoffset.Is64Bits() || (extend != SXTX)); in MemOperand() 415 Register regoffset, in MemOperand() argument 419 regoffset_(regoffset), in MemOperand() 426 VIXL_ASSERT(regoffset.Is64Bits() && !regoffset.IsSP()); in MemOperand()
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D | operands-aarch64.h | 857 Register regoffset, 861 Register regoffset,
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/external/u-boot/drivers/ram/k3-j721e/ |
D | lpddr4.c | 158 uint32_t regoffset) in lpddr4_addoffset() argument 163 volatile uint32_t *regaddr = &local_addr[regoffset]; in lpddr4_addoffset() 282 uint32_t regoffset, uint32_t * regvalue) in lpddr4_readreg() argument 291 if (regoffset >= LPDDR4_CTL_REG_COUNT) { in lpddr4_readreg() 298 regoffset)); in lpddr4_readreg() 301 if (regoffset >= LPDDR4_PHY_REG_COUNT) { in lpddr4_readreg() 308 regoffset)); in lpddr4_readreg() 312 if (regoffset >= LPDDR4_PHY_INDEP_REG_COUNT) { in lpddr4_readreg() 319 regoffset)); in lpddr4_readreg() 327 uint32_t regoffset, uint32_t regvalue) in lpddr4_writereg() argument [all …]
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D | lpddr4_obj_if.h | 73 …uint32_t (*readreg)(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint32_… 84 …uint32_t (*writereg)(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint32…
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D | lpddr4_if.h | 280 uint32_t lpddr4_readreg(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uint… 291 uint32_t lpddr4_writereg(const lpddr4_privatedata* pd, lpddr4_regblock cpp, uint32_t regoffset, uin…
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/external/v8/src/codegen/arm64/ |
D | assembler-arm64-inl.h | 386 MemOperand::MemOperand(Register base, Register regoffset, Extend extend, 389 regoffset_(regoffset), 396 DCHECK(!regoffset.IsSP()); 400 DCHECK(regoffset.Is64Bits() || (extend != SXTX)); 403 MemOperand::MemOperand(Register base, Register regoffset, Shift shift, 406 regoffset_(regoffset), 413 DCHECK(regoffset.Is64Bits() && !regoffset.IsSP());
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D | assembler-arm64.h | 138 inline explicit MemOperand(Register base, Register regoffset, 140 inline explicit MemOperand(Register base, Register regoffset, Extend extend, 146 const Register& regoffset() const { return regoffset_; } in regoffset() function
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D | assembler-arm64.cc | 2232 addr_field |= RmNot31(addr.regoffset()); in LoadStoreStructAddrModeField() 2303 DCHECK(addr.regoffset() != NoReg || addr.offset() == offset); in LoadStoreStructVerify() 3964 Emit(LoadStoreRegisterOffsetFixed | memop | Rm(addr.regoffset()) | in LoadStore()
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/external/llvm/docs/ |
D | MarkedUpDisassembly.rst | 75 ldr <reg gpr:r0>, <mem regoffset:[<reg gpr:sp>, <imm:#4>]>
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | MarkedUpDisassembly.rst | 75 ldr <reg gpr:r0>, <mem regoffset:[<reg gpr:sp>, <imm:#4>]>
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/external/v8/src/wasm/baseline/arm64/ |
D | liftoff-assembler-arm64.h | 1522 Add(tmp, src_op.base(), src_op.regoffset().X()); in LoadTransform()
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