| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/SystemZ/ |
| D | int-arith.ll | 24 %res17 = add <16 x i16> undef, undef
45 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = add <16 x i16> undef,…
70 %res17 = sub <16 x i16> undef, undef
91 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = sub <16 x i16> undef,…
116 %res17 = mul <16 x i16> undef, undef
137 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = mul <16 x i16> undef,…
162 %res17 = sdiv <16 x i16> undef, undef
183 ; CHECK: Cost Model: Found an estimated cost of 80 for instruction: %res17 = sdiv <16 x i16> unde…
208 %res17 = srem <16 x i16> undef, undef
229 ; CHECK: Cost Model: Found an estimated cost of 80 for instruction: %res17 = srem <16 x i16> unde…
[all …]
|
| D | logical.ll | 21 %res17 = and <16 x i16> undef, undef
42 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = and <16 x i16> undef,…
67 %res17 = ashr <16 x i16> undef, undef
88 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = ashr <16 x i16> undef…
113 %res17 = lshr <16 x i16> undef, undef
134 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = lshr <16 x i16> undef…
159 %res17 = or <16 x i16> undef, undef
180 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = or <16 x i16> undef, …
205 %res17 = shl <16 x i16> undef, undef
226 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res17 = shl <16 x i16> undef,…
[all …]
|
| /external/u-boot/arch/arm/mach-exynos/include/mach/ |
| D | dmc.h | 94 unsigned char res17[0xC]; member
161 unsigned char res17[0x4]; member
255 unsigned char res17[0x4]; member
|
| D | clock.h | 45 unsigned char res17[0x8]; member
274 unsigned char res17[0xec]; member
579 unsigned char res17[0xf8]; member
922 unsigned char res17[0x0c]; member
|
| D | dp.h | 142 unsigned char res17[0x18]; member
|
| D | power.h | 89 unsigned char res17[0x1c]; member
313 unsigned char res17[0x4]; member
|
| /external/u-boot/include/linux/mtd/ |
| D | samsung_onenand.h | 50 unsigned char res17[0xc]; member
|
| /external/u-boot/arch/powerpc/include/asm/ |
| D | immap_86xx.h | 54 char res17[4]; member
177 char res17[4]; member
240 char res17[4]; member
332 char res17[64]; member
556 char res17[12]; member
902 char res17[92]; member
|
| D | fsl_pci.h | 134 char res17[4];
|
| D | immap_85xx.h | 82 u8 res17[4]; member
401 u8 res17[224]; member
656 u8 res17[12]; member
1751 u8 res17[24]; member
2006 u8 res17[0x3dc]; member
2108 u8 res17[4]; member
2516 u8 res17[61592]; member
|
| D | immap_8xx.h | 420 u_char res17[0xc]; member
|
| /external/llvm/test/Bitcode/ |
| D | miscInstructions.3.2.ll | 165 ; CHECK-NEXT: %res17 = fcmp oeq <2 x float> %vec1, %vec2
166 %res17 = fcmp oeq <2 x float> %vec1, %vec2
|
| D | memInstructions.3.2.ll | 296 ; CHECK-NEXT: %res17 = extractvalue { i32, i1 } [[TMP]], 0
297 %res17 = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Bitcode/ |
| D | miscInstructions.3.2.ll | 165 ; CHECK-NEXT: %res17 = fcmp oeq <2 x float> %vec1, %vec2
166 %res17 = fcmp oeq <2 x float> %vec1, %vec2
|
| D | memInstructions.3.2.ll | 296 ; CHECK-NEXT: %res17 = extractvalue { i32, i1 } [[TMP]], 0
297 %res17 = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
|
| /external/u-boot/drivers/net/ |
| D | fec_mxc.h | 136 uint32_t res17[60]; /* MBAR_ETH + 0x300-3FF */ member
|
| /external/u-boot/arch/m68k/include/asm/ |
| D | immap_5301x.h | 241 u8 res17; /* 0x53 */ member
|
| D | immap_5272.h | 250 ushort res17; member
|
| D | immap_5275.h | 285 u16 res17; member
|
| /external/u-boot/arch/arm/include/asm/arch-omap3/ |
| D | cpu.h | 351 u8 res17[0x18]; member
|
| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | edp_rk3288.h | 105 u8 res17[0x34]; member
|
| /external/llvm/test/CodeGen/X86/ |
| D | merge-consecutive-loads-512.ll | 606 %res17 = insertelement <64 x i8> %res16, i8 0, i8 17
607 %res63 = insertelement <64 x i8> %res17, i8 0, i8 63
641 %res17 = insertelement <64 x i8> %res16, i8 0, i8 17
642 %res63 = insertelement <64 x i8> %res17, i8 0, i8 63
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | merge-consecutive-loads-512.ll | 618 %res17 = insertelement <64 x i8> %res16, i8 0, i8 17
619 %res63 = insertelement <64 x i8> %res17, i8 0, i8 63
653 %res17 = insertelement <64 x i8> %res16, i8 0, i8 17
654 %res63 = insertelement <64 x i8> %res17, i8 0, i8 63
|
| /external/u-boot/include/ |
| D | fsl_ifc.h | 886 u32 res17[0x2]; member
|
| /external/u-boot/arch/arm/include/asm/arch-imx8m/ |
| D | ddr.h | 239 u32 res17[6]; member
|