/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | shift-cmp.ll | 13 ; CHECK: rlwnm 3, 3, 4, 31, 31 38 ; CHECK: rlwnm 3, [[REG]], 4, 31, 31
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D | rlwinm-zero-ext.ll | 41 ; CHECK-NOT: rlwnm {{{[0-9]+}}}, {{[0-9]+}}, {{{[0-9]+}}}, 28, 31 42 ; CHECK: rlwnm. [[REG:[0-9]+]], {{[0-9]+}}, 4, 28, 31
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D | rlwinm2.ll | 7 ; RUN: grep rlwnm %t | count 1
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D | funnel-shift-rot.ll | 58 ; CHECK-NEXT: rlwnm 3, 3, 4, 0, 31 151 ; CHECK-NEXT: rlwnm 3, 3, 4, 0, 31
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding.s | 710 # CHECK-BE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4c] 711 # CHECK-LE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x4c,0x21,0x62,0x5c] 712 rlwnm 2, 3, 4, 5, 6 713 # CHECK-BE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4d] 714 # CHECK-LE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x4d,0x21,0x62,0x5c] 715 rlwnm. 2, 3, 4, 5, 6 777 # CHECK-BE: rlwnm 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xfe] 778 rlwnm 0, 0, 30, 1 779 # CHECK-BE: rlwnm. 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xff] 780 rlwnm. 0, 0, 30, 1 [all …]
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/external/llvm/test/CodeGen/PowerPC/ |
D | rlwinm-zero-ext.ll | 41 ; CHECK-NOT: rlwnm {{{[0-9]+}}}, {{[0-9]+}}, {{{[0-9]+}}}, 28, 31 42 ; CHECK: rlwnm. [[REG:[0-9]+]], {{[0-9]+}}, 4, 28, 31
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D | rlwinm2.ll | 7 ; RUN: grep rlwnm %t | count 1
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding.s.cs | 165 0x5c,0x62,0x21,0x4c = rlwnm 2, 3, 4, 5, 6 166 0x5c,0x62,0x21,0x4d = rlwnm. 2, 3, 4, 5, 6
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D | ppc64-encoding-ext.s.cs | 509 0x5c,0x62,0x20,0x3e = rlwnm 2, 3, 4, 0, 31 510 0x5c,0x62,0x20,0x3f = rlwnm. 2, 3, 4, 0, 31
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding.s | 798 # CHECK-BE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4c] 799 # CHECK-LE: rlwnm 2, 3, 4, 5, 6 # encoding: [0x4c,0x21,0x62,0x5c] 800 rlwnm 2, 3, 4, 5, 6 801 # CHECK-BE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4d] 802 # CHECK-LE: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x4d,0x21,0x62,0x5c] 803 rlwnm. 2, 3, 4, 5, 6 865 # CHECK-BE: rlwnm 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xfe] 866 rlwnm 0, 0, 30, 1 867 # CHECK-BE: rlwnm. 0, 0, 30, 31, 31 # encoding: [0x5c,0x00,0xf7,0xff] 868 rlwnm. 0, 0, 30, 1 [all …]
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/external/u-boot/post/lib_powerpc/ |
D | Makefile | 8 obj-y += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64le-encoding.txt | 559 # CHECK: rlwnm 2, 3, 4, 5, 6 562 # CHECK: rlwnm. 2, 3, 4, 5, 6
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D | ppc64-encoding.txt | 604 # CHECK: rlwnm 2, 3, 4, 5, 6 607 # CHECK: rlwnm. 2, 3, 4, 5, 6
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding.txt | 568 # CHECK: rlwnm 2, 3, 4, 5, 6 571 # CHECK: rlwnm. 2, 3, 4, 5, 6
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D | ppc64le-encoding.txt | 547 # CHECK: rlwnm 2, 3, 4, 5, 6 550 # CHECK: rlwnm. 2, 3, 4, 5, 6
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/external/v8/src/codegen/ppc/ |
D | assembler-ppc.cc | 741 void Assembler::rlwnm(Register ra, Register rs, Register rb, int mb, int me, in rlwnm() function in v8::internal::Assembler 781 rlwnm(ra, rs, rb, 0, 31, r); in rotlw()
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D | assembler-ppc.h | 873 void rlwnm(Register ra, Register rs, Register rb, int mb, int me,
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D | constants-ppc.h | 2207 V(rlwnm, RLWNMX, 0x5C000000)
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/external/u-boot/doc/ |
D | README.POST | 475 This group will contain: slw, srw, sraw, srawi, rlwinm, rlwnm,
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 4300 "icl\006rldicr\006rldimi\006rlwimi\006rlwinm\005rlwnm\005rotld\006rotldi" 6181 …{ 9055 /* rlwnm */, PPC::RLWNMbm, Convert__RegG8RC1_0__RegG8RC1_1__U5Imm1_2__Imm1_3, 0, { MCK_RegG… 6182 …{ 9055 /* rlwnm */, PPC::RLWNMobm, Convert__RegG8RC1_1__RegG8RC1_2__U5Imm1_3__Imm1_4, 0, { MCK__DO… 6183 …{ 9055 /* rlwnm */, PPC::RLWNM, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__U5Imm1_3__U5Imm1_4, 0… 6184 …{ 9055 /* rlwnm */, PPC::RLWNMo, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__U5Imm1_4__U5Imm1_5, …
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 744 "rlwnm", "$rA, $rS, $rB, $MB, $ME", IIC_IntGeneral,
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D | PPCInstrInfo.td | 2657 "rlwnm", "$rA, $rS, $rB, $MB, $ME", IIC_IntGeneral, 4033 def RLWNMbm : PPCAsmPseudo<"rlwnm $rA, $rS, $n, $b", 4035 def RLWNMobm : PPCAsmPseudo<"rlwnm. $rA, $rS, $n, $b",
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 870 "rlwnm", "$rA, $rS, $rB, $MB, $ME", IIC_IntGeneral,
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D | PPCInstrInfo.td | 2937 "rlwnm", "$rA, $rS, $rB, $MB, $ME", IIC_IntGeneral, 4555 def RLWNMbm : PPCAsmPseudo<"rlwnm $rA, $rS, $n, $b", 4557 def RLWNMobm : PPCAsmPseudo<"rlwnm. $rA, $rS, $n, $b",
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