/external/llvm/test/CodeGen/PowerPC/ |
D | rotl.ll | 2 ; RUN: llc < %s -march=ppc32 | grep rotlw: | count 1 6 define i32 @rotlw(i32 %x, i32 %sh) {
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D | rotl-2.ll | 3 ; RUN: llc < %s -march=ppc32 | grep rotlw | count 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | rotl.ll | 2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep rotlw: | count 1 6 define i32 @rotlw(i32 %x, i32 %sh) {
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D | rotl-2.ll | 3 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep rotlw | count 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-ext.s | 3377 # CHECK-BE: rotlw 2, 3, 4 # encoding: [0x5c,0x62,0x20,0x3e] 3378 # CHECK-LE: rotlw 2, 3, 4 # encoding: [0x3e,0x20,0x62,0x5c] 3379 rotlw 2, 3, 4 3380 # CHECK-BE: rotlw. 2, 3, 4 # encoding: [0x5c,0x62,0x20,0x3f] 3381 # CHECK-LE: rotlw. 2, 3, 4 # encoding: [0x3f,0x20,0x62,0x5c] 3382 rotlw. 2, 3, 4
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-ext.s | 3377 # CHECK-BE: rotlw 2, 3, 4 # encoding: [0x5c,0x62,0x20,0x3e] 3378 # CHECK-LE: rotlw 2, 3, 4 # encoding: [0x3e,0x20,0x62,0x5c] 3379 rotlw 2, 3, 4 3380 # CHECK-BE: rotlw. 2, 3, 4 # encoding: [0x5c,0x62,0x20,0x3f] 3381 # CHECK-LE: rotlw. 2, 3, 4 # encoding: [0x3f,0x20,0x62,0x5c] 3382 rotlw. 2, 3, 4
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-ext.txt | 2173 # CHECK: rotlw 2, 3, 4 2176 # CHECK: rotlw. 2, 3, 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-ext.txt | 2173 # CHECK: rotlw 2, 3, 4 2176 # CHECK: rotlw. 2, 3, 4
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/external/v8/src/codegen/ppc/ |
D | assembler-ppc.h | 881 void rotlw(Register ra, Register rs, Register rb, RCBit r = LeaveRC);
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D | assembler-ppc.cc | 780 void Assembler::rotlw(Register ra, Register rs, Register rb, RCBit r) { in rotlw() function in v8::internal::Assembler
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/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 1384 __ rotlw(i.OutputRegister(), i.InputRegister(0), kScratchReg, in AssembleArchInstruction() local
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 4301 "\005rotlw\006rotlwi\006rotrdi\006rotrwi\002sc\004setb\005slbia\005slbie" 6189 …{ 9074 /* rotlw */, PPC::RLWNM, Convert__RegGPRC1_0__RegGPRC1_1__RegGPRC1_2__imm_95_0__imm_95_31, … 6190 …{ 9074 /* rotlw */, PPC::RLWNMo, Convert__RegGPRC1_1__RegGPRC1_2__RegGPRC1_3__imm_95_0__imm_95_31,…
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D | PPCGenAsmWriter.inc | 9915 AsmString = "rotlw $\x01, $\x02, $\x03"; 9932 AsmString = "rotlw. $\x01, $\x02, $\x03";
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 3974 def : InstAlias<"rotlw $rA, $rS, $rB", (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31)>; 3975 def : InstAlias<"rotlw. $rA, $rS, $rB", (RLWNMo gprc:$rA, gprc:$rS, gprc:$rB, 0, 31)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 4492 def : InstAlias<"rotlw $rA, $rS, $rB", (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31)>; 4493 def : InstAlias<"rotlw. $rA, $rS, $rB", (RLWNMo gprc:$rA, gprc:$rS, gprc:$rB, 0, 31)>;
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/external/capstone/arch/PowerPC/ |
D | PPCGenAsmWriter.inc | 7135 AsmString = "rotlw $\x01, $\x02, $\x03"; 7152 AsmString = "rotlw. $\x01, $\x02, $\x03";
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