Searched refs:row_3_4 (Results 1 – 23 of 23) sorted by relevance
/external/u-boot/arch/arm/mach-rockchip/ |
D | sdram.c | 80 u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4; in rockchip_sdram_size() local 137 row_3_4 = sys_reg2 >> SYS_REG_ROW_3_4_SHIFT(ch) & in rockchip_sdram_size() 149 if (row_3_4) in rockchip_sdram_size() 156 cs1_row, bw, row_3_4); in rockchip_sdram_size() 161 bw, row_3_4); in rockchip_sdram_size()
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/external/u-boot/drivers/ram/rockchip/ |
D | sdram_common.c | 84 if (cap_info->row_3_4) in sdram_print_ddr_info() 176 *p_os_reg2 |= SYS_REG_ENC_ROW_3_4(cap_info->row_3_4, channel); in sdram_org_config() 348 u32 row_3_4; in sdram_detect_row_3_4() local 360 row_3_4 = 0; in sdram_detect_row_3_4() 362 row_3_4 = 1; in sdram_detect_row_3_4() 364 cap_info->row_3_4 = row_3_4; in sdram_detect_row_3_4()
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D | sdram-px30-ddr3-detect-333.inc | 9 .row_3_4 = 0x0,
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D | sdram-px30-lpddr3-detect-333.inc | 9 .row_3_4 = 0x0,
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D | sdram-px30-ddr4-detect-333.inc | 9 .row_3_4 = 0x0,
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D | sdram-px30-lpddr2-detect-333.inc | 9 .row_3_4 = 0x0,
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D | sdram_rk3399.c | 1468 if (params->ch[channel].cap_info.row_3_4) { in set_ddrconfig() 1806 u32 cs = 0, col = 0, bk = 0, bw = 0, row_3_4 = 0; in lpddr4_mr_detect() local 1826 row_3_4 = params->ch[channel].cap_info.row_3_4; in lpddr4_mr_detect() 1836 params->ch[channel].cap_info.row_3_4 = 0; in lpddr4_mr_detect() 1853 if (params->ch[channel].cap_info.row_3_4) in lpddr4_mr_detect() 1883 params->ch[channel].cap_info.row_3_4 = row_3_4; in lpddr4_mr_detect() 2736 if (cap_info->row_3_4) in dram_detect_cap() 2783 if (cap_info->row_3_4) { in calculate_stride() 2918 params->ch[channel].cap_info.row_3_4 = 0; in clear_channel_params()
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D | sdram_rk322x.c | 584 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0); in dram_all_config() 668 sdram_params->ch[0].row_3_4 = 0; in dram_cap_detect()
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D | dmc-rk3368.c | 653 params->chan.row_3_4 = 0; in sdram_col_row_detect() 780 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
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D | sdram_rk3188.c | 544 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config() 671 sdram_params->ch[channel].row_3_4 = 0; in sdram_col_row_detect()
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D | sdram_rk3288.c | 602 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config() 716 sdram_params->ch[channel].row_3_4 = 0; in sdram_col_row_detect()
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D | sdram_rk3328.c | 223 if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4) in set_ctl_address_map()
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D | sdram_px30.c | 285 cap_info->row_3_4) in set_ctl_address_map()
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D | sdram-rk3399-lpddr4-400.inc | 16 .row_3_4 = 0x0, 49 .row_3_4 = 0x0,
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D | sdram-rk3399-lpddr4-800.inc | 16 .row_3_4 = 0x0, 49 .row_3_4 = 0x0,
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/external/u-boot/arch/arm/include/asm/arch-rockchip/ |
D | sdram_rk3288.h | 22 u8 row_3_4; member
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D | sdram_common.h | 32 unsigned int row_3_4; member
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D | sdram_rk322x.h | 21 u8 row_3_4; member
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/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/ |
D | dram.h | 132 unsigned char row_3_4; member
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D | dram.c | 37 ch->row_3_4 = SYS_REG_DEC_ROW_3_4(os_reg2_val, i); in dram_init()
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D | suspend.c | 440 if (ch->row_3_4) { in set_ddrconfig()
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D | dfs.c | 97 if (ch->row_3_4) in get_cs_die_capability()
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/external/u-boot/doc/device-tree-bindings/clock/ |
D | rockchip,rk3288-dmc.txt | 100 row_3_4
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