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Searched refs:rrb (Results 1 – 25 of 26) sorted by relevance

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/external/mesa3d/src/mesa/drivers/dri/r200/
Dradeon_fbo.c52 struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); in radeon_delete_renderbuffer() local
56 __func__, rb, rrb); in radeon_delete_renderbuffer()
58 assert(rrb); in radeon_delete_renderbuffer()
60 if (rrb && rrb->bo) { in radeon_delete_renderbuffer()
61 radeon_bo_unref(rrb->bo); in radeon_delete_renderbuffer()
67 static GLuint get_depth_z32(const struct radeon_renderbuffer * rrb, in get_depth_z32() argument
72 ba = (y >> 4) * (rrb->pitch >> 6) + (x >> 4); in get_depth_z32()
84 static GLuint get_depth_z16(const struct radeon_renderbuffer * rrb, in get_depth_z16() argument
89 ba = (y / 16) * (rrb->pitch >> 6) + (x / 32); in get_depth_z16()
103 static GLuint get_depth_z32(const struct radeon_renderbuffer * rrb, in get_depth_z32() argument
[all …]
Dradeon_tex_copy.c44 struct radeon_renderbuffer *rrb, in do_copy_texsubimage() argument
62 if (!rrb) { in do_copy_texsubimage()
78 assert(rrb->bo); in do_copy_texsubimage()
84 intptr_t src_offset = rrb->draw_offset; in do_copy_texsubimage()
92 … x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp); in do_copy_texsubimage()
93 fprintf(stderr, "src size %d, dst size %d\n", rrb->bo->size, timg->mt->bo->size); in do_copy_texsubimage()
97 src_mesaformat = rrb->base.Base.Format; in do_copy_texsubimage()
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) { in do_copy_texsubimage()
128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp, in do_copy_texsubimage()
129 rrb->base.Base.Width, rrb->base.Base.Height, x, y, in do_copy_texsubimage()
Dradeon_common.h42 struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb; in radeon_renderbuffer() local
46 if (rrb && rrb->base.Base.ClassID == RADEON_RB_CLASS) in radeon_renderbuffer()
47 return rrb; in radeon_renderbuffer()
66 struct radeon_renderbuffer *rrb; in radeon_get_depthbuffer() local
67 rrb = radeon_renderbuffer(rmesa->state.depth.rb); in radeon_get_depthbuffer()
68 if (!rrb) in radeon_get_depthbuffer()
71 return rrb; in radeon_get_depthbuffer()
76 struct radeon_renderbuffer *rrb; in radeon_get_colorbuffer() local
78 rrb = radeon_renderbuffer(rmesa->state.color.rb); in radeon_get_colorbuffer()
79 if (!rrb) in radeon_get_colorbuffer()
[all …]
Dradeon_span.c60 struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); in radeon_renderbuffer_map() local
64 if (!rb || !rrb) in radeon_renderbuffer_map()
71 rrb->base.Map = map; in radeon_renderbuffer_map()
72 rrb->base.RowStride = stride; in radeon_renderbuffer_map()
74 rrb->base.ColorType = GL_UNSIGNED_BYTE; in radeon_renderbuffer_map()
80 struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); in radeon_renderbuffer_unmap() local
81 if (!rb || !rrb) in radeon_renderbuffer_unmap()
86 rrb->base.Map = NULL; in radeon_renderbuffer_unmap()
87 rrb->base.RowStride = 0; in radeon_renderbuffer_unmap()
Dradeon_pixel_read.c96 const struct radeon_renderbuffer *rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer); in do_blit_readpixels() local
109 !radeon->vtbl.check_blit(dst_format, rrb->pitch / rrb->cpp) || !radeon->vtbl.blit) { in do_blit_readpixels()
154 y = rrb->base.Base.Height - height - y; in do_blit_readpixels()
159 rrb->bo, in do_blit_readpixels()
160 rrb->draw_offset, in do_blit_readpixels()
161 rrb->base.Base.Format, in do_blit_readpixels()
162 rrb->pitch / rrb->cpp, in do_blit_readpixels()
163 rrb->base.Base.Width, in do_blit_readpixels()
164 rrb->base.Base.Height, in do_blit_readpixels()
Dradeon_common.c229 struct radeon_renderbuffer *rrb; in radeon_draw_buffer() local
230 rrb = radeon_renderbuffer(fb->_ColorDrawBuffers[0]); in radeon_draw_buffer()
231 if (rrb) { in radeon_draw_buffer()
232 offset = rrb->draw_offset; in radeon_draw_buffer()
233 rrbColor = rrb; in radeon_draw_buffer()
571 struct radeon_renderbuffer *rrb; in radeonFinish() local
578 struct radeon_renderbuffer *rrb; in radeonFinish() local
579 rrb = radeon_renderbuffer(fb->_ColorDrawBuffers[i]); in radeonFinish()
580 if (rrb && rrb->bo) in radeonFinish()
581 radeon_bo_wait(rrb->bo); in radeonFinish()
[all …]
Dr200_state_init.c328 struct radeon_renderbuffer *rrb; in check_rrb() local
329 rrb = radeon_get_colorbuffer(&r200->radeon); in check_rrb()
330 if (!rrb || !rrb->bo) in check_rrb()
415 struct radeon_renderbuffer *rrb, *drb; in check_always_ctx() local
418 rrb = radeon_get_colorbuffer(&r200->radeon); in check_always_ctx()
419 if (!rrb || !rrb->bo) { in check_always_ctx()
428 if (rrb) in check_always_ctx()
441 struct radeon_renderbuffer *rrb, *drb; in ctx_emit_cs() local
447 rrb = radeon_get_colorbuffer(&r200->radeon); in ctx_emit_cs()
448 if (!rrb || !rrb->bo) { in ctx_emit_cs()
[all …]
Dradeon_screen.c269 struct radeon_renderbuffer *rrb; in radeon_create_image_from_renderbuffer() local
278 rrb = radeon_renderbuffer(rb); in radeon_create_image_from_renderbuffer()
285 image->cpp = rrb->cpp; in radeon_create_image_from_renderbuffer()
288 radeon_bo_ref(rrb->bo); in radeon_create_image_from_renderbuffer()
289 image->bo = rrb->bo; in radeon_create_image_from_renderbuffer()
293 image->pitch = rrb->pitch / image->cpp; in radeon_create_image_from_renderbuffer()
Dr200_state.c684 struct radeon_renderbuffer *rrb; in r200ColorMask() local
687 rrb = radeon_get_colorbuffer(&rmesa->radeon); in r200ColorMask()
688 if (!rrb) in r200ColorMask()
690 mask = radeonPackColor( rrb->cpp, in r200ColorMask()
1581 struct radeon_renderbuffer *rrb; in r200_vtbl_update_scissor() local
1591 rrb = radeon_get_colorbuffer(&r200->radeon); in r200_vtbl_update_scissor()
1594 x2 = rrb->base.Base.Width - 1; in r200_vtbl_update_scissor()
1595 y2 = rrb->base.Base.Height - 1; in r200_vtbl_update_scissor()
2140 struct radeon_renderbuffer *rrb; in r200ValidateBuffers() local
2148 rrb = radeon_get_colorbuffer(&rmesa->radeon); in r200ValidateBuffers()
[all …]
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_fbo.c52 struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); in radeon_delete_renderbuffer() local
56 __func__, rb, rrb); in radeon_delete_renderbuffer()
58 assert(rrb); in radeon_delete_renderbuffer()
60 if (rrb && rrb->bo) { in radeon_delete_renderbuffer()
61 radeon_bo_unref(rrb->bo); in radeon_delete_renderbuffer()
67 static GLuint get_depth_z32(const struct radeon_renderbuffer * rrb, in get_depth_z32() argument
72 ba = (y >> 4) * (rrb->pitch >> 6) + (x >> 4); in get_depth_z32()
84 static GLuint get_depth_z16(const struct radeon_renderbuffer * rrb, in get_depth_z16() argument
89 ba = (y / 16) * (rrb->pitch >> 6) + (x / 32); in get_depth_z16()
103 static GLuint get_depth_z32(const struct radeon_renderbuffer * rrb, in get_depth_z32() argument
[all …]
Dradeon_tex_copy.c44 struct radeon_renderbuffer *rrb, in do_copy_texsubimage() argument
62 if (!rrb) { in do_copy_texsubimage()
78 assert(rrb->bo); in do_copy_texsubimage()
84 intptr_t src_offset = rrb->draw_offset; in do_copy_texsubimage()
92 … x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp); in do_copy_texsubimage()
93 fprintf(stderr, "src size %d, dst size %d\n", rrb->bo->size, timg->mt->bo->size); in do_copy_texsubimage()
97 src_mesaformat = rrb->base.Base.Format; in do_copy_texsubimage()
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) { in do_copy_texsubimage()
128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp, in do_copy_texsubimage()
129 rrb->base.Base.Width, rrb->base.Base.Height, x, y, in do_copy_texsubimage()
Dradeon_common.h42 struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb; in radeon_renderbuffer() local
46 if (rrb && rrb->base.Base.ClassID == RADEON_RB_CLASS) in radeon_renderbuffer()
47 return rrb; in radeon_renderbuffer()
66 struct radeon_renderbuffer *rrb; in radeon_get_depthbuffer() local
67 rrb = radeon_renderbuffer(rmesa->state.depth.rb); in radeon_get_depthbuffer()
68 if (!rrb) in radeon_get_depthbuffer()
71 return rrb; in radeon_get_depthbuffer()
76 struct radeon_renderbuffer *rrb; in radeon_get_colorbuffer() local
78 rrb = radeon_renderbuffer(rmesa->state.color.rb); in radeon_get_colorbuffer()
79 if (!rrb) in radeon_get_colorbuffer()
[all …]
Dradeon_span.c60 struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); in radeon_renderbuffer_map() local
64 if (!rb || !rrb) in radeon_renderbuffer_map()
71 rrb->base.Map = map; in radeon_renderbuffer_map()
72 rrb->base.RowStride = stride; in radeon_renderbuffer_map()
74 rrb->base.ColorType = GL_UNSIGNED_BYTE; in radeon_renderbuffer_map()
80 struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); in radeon_renderbuffer_unmap() local
81 if (!rb || !rrb) in radeon_renderbuffer_unmap()
86 rrb->base.Map = NULL; in radeon_renderbuffer_unmap()
87 rrb->base.RowStride = 0; in radeon_renderbuffer_unmap()
Dradeon_pixel_read.c96 const struct radeon_renderbuffer *rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer); in do_blit_readpixels() local
109 !radeon->vtbl.check_blit(dst_format, rrb->pitch / rrb->cpp) || !radeon->vtbl.blit) { in do_blit_readpixels()
154 y = rrb->base.Base.Height - height - y; in do_blit_readpixels()
159 rrb->bo, in do_blit_readpixels()
160 rrb->draw_offset, in do_blit_readpixels()
161 rrb->base.Base.Format, in do_blit_readpixels()
162 rrb->pitch / rrb->cpp, in do_blit_readpixels()
163 rrb->base.Base.Width, in do_blit_readpixels()
164 rrb->base.Base.Height, in do_blit_readpixels()
Dradeon_common.c229 struct radeon_renderbuffer *rrb; in radeon_draw_buffer() local
230 rrb = radeon_renderbuffer(fb->_ColorDrawBuffers[0]); in radeon_draw_buffer()
231 if (rrb) { in radeon_draw_buffer()
232 offset = rrb->draw_offset; in radeon_draw_buffer()
233 rrbColor = rrb; in radeon_draw_buffer()
571 struct radeon_renderbuffer *rrb; in radeonFinish() local
578 struct radeon_renderbuffer *rrb; in radeonFinish() local
579 rrb = radeon_renderbuffer(fb->_ColorDrawBuffers[i]); in radeonFinish()
580 if (rrb && rrb->bo) in radeonFinish()
581 radeon_bo_wait(rrb->bo); in radeonFinish()
[all …]
Dradeon_state_init.c299 struct radeon_renderbuffer *rrb, *drb; in check_always_ctx() local
302 rrb = radeon_get_colorbuffer(&r100->radeon); in check_always_ctx()
303 if (!rrb || !rrb->bo) { in check_always_ctx()
312 if (rrb) in check_always_ctx()
322 struct radeon_renderbuffer *rrb, *drb; in ctx_emit_cs() local
328 rrb = radeon_get_colorbuffer(&r100->radeon); in ctx_emit_cs()
329 if (!rrb || !rrb->bo) { in ctx_emit_cs()
335 if (rrb->cpp == 4) in ctx_emit_cs()
337 else switch (rrb->base.Base.Format) { in ctx_emit_cs()
354 cbpitch = (rrb->pitch / rrb->cpp); in ctx_emit_cs()
[all …]
Dradeon_screen.c269 struct radeon_renderbuffer *rrb; in radeon_create_image_from_renderbuffer() local
278 rrb = radeon_renderbuffer(rb); in radeon_create_image_from_renderbuffer()
285 image->cpp = rrb->cpp; in radeon_create_image_from_renderbuffer()
288 radeon_bo_ref(rrb->bo); in radeon_create_image_from_renderbuffer()
289 image->bo = rrb->bo; in radeon_create_image_from_renderbuffer()
293 image->pitch = rrb->pitch / image->cpp; in radeon_create_image_from_renderbuffer()
Dradeon_state.c497 struct radeon_renderbuffer *rrb; in radeonColorMask() local
500 rrb = radeon_get_colorbuffer(&rmesa->radeon); in radeonColorMask()
501 if (!rrb) in radeonColorMask()
504 mask = radeonPackColor( rrb->cpp, in radeonColorMask()
1922 struct radeon_renderbuffer *rrb; in r100ValidateBuffers() local
1927 rrb = radeon_get_colorbuffer(&rmesa->radeon); in r100ValidateBuffers()
1929 if (rrb && rrb->bo) { in r100ValidateBuffers()
1930 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, in r100ValidateBuffers()
1935 rrb = radeon_get_depthbuffer(&rmesa->radeon); in r100ValidateBuffers()
1937 if (rrb && rrb->bo) { in r100ValidateBuffers()
[all …]
/external/autotest/client/cros/netprotos/
Dzeroconf.py28 def _RR_equals(rra, rrb): argument
31 keys = set(rra.__dict__.keys() + rrb.__dict__.keys() +
38 if hasattr(rra, key) != hasattr(rrb, key):
45 getattr(rrb, key) & ~DNS_CACHE_FLUSH):
48 if getattr(rra, key) != getattr(rrb, key):
/external/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/
Dp5-0x.cpp120 B&& rrb = x;
/external/libunwind/doc/
Dlibunwind-ia64.tex149 \texttt{CFM.rrb.pr} were set to 0. Thus, in general the value of
151 in bit \texttt{16 + (($N$-16)+CFM.rrb.pr) \% 48}.
/external/llvm/lib/Target/X86/
DX86InstrAVX512.td3780 defm rrb : AVX512_maskable_scalar<opc, MRMSrcReg, _, (outs _.RC:$dst),
3790 defm rrb : AVX512_maskable_scalar<opc, MRMSrcReg, _, (outs _.RC:$dst),
5278 defm rrb : AVX512_maskable_scalar<opc, MRMSrcReg, _, (outs _.RC:$dst),
5290 defm rrb : AVX512_maskable_scalar<opc, MRMSrcReg, _, (outs _.RC:$dst),
5373 defm rrb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
5384 defm rrb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrAVX512.td5340 defm rrb: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
5351 defm rrb: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
7676 defm rrb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
7688 defm rrb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
8375 defm rrb : AVX512_maskable<0x13, MRMSrcReg, _dest, (outs _dest.RC:$dst),
8430 defm rrb : AVX512_maskable_in_asm<0x1D, MRMDestReg, _dest,
8490 def rrb: AVX512<opc, MRMSrcReg, (outs), (ins _.RC:$src1, _.RC:$src2),
/external/ImageMagick/PerlMagick/t/reference/wmf/
Dclock.miff287 …�����������������������������������������������������������������/A�����rrb���߸�������㦦�����㦦��…
/external/cldr/tools/java/org/unicode/cldr/util/data/transforms/
Dinternal_raw_IPA-old.txt73127 forbidden %30888 for-, fərbˈɪdn, fərbˈɪdən, fərrbˈɪdən, fˈɔrbədən

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