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Searched refs:shift_imm (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h161 Operand(Register rm, Shift shift, uint32_t shift_imm) {
162 ASSERT(shift_imm < (1 << kShiftImmBits));
164 encoding_ = shift_imm << kShiftImmShift |
302 Shift shift = LSL, uint32_t shift_imm = 0, Mode am = Offset) {
303 Operand o(rm, shift, shift_imm);
305 if ((shift == LSL) && (shift_imm == 0)) {
1049 void Lsl(Register rd, Register rm, const Operand& shift_imm,
1054 void Lsr(Register rd, Register rm, const Operand& shift_imm,
1059 void Asr(Register rd, Register rm, const Operand& shift_imm,
1064 void Asrs(Register rd, Register rm, const Operand& shift_imm,
[all …]
Dassembler_arm.cc2602 void Assembler::Lsl(Register rd, Register rm, const Operand& shift_imm,
2604 ASSERT(shift_imm.type() == 1);
2605 ASSERT(shift_imm.encoding() != 0); // Do not use Lsl if no shift is wanted.
2606 mov(rd, Operand(rm, LSL, shift_imm.encoding()), cond);
2615 void Assembler::Lsr(Register rd, Register rm, const Operand& shift_imm,
2617 ASSERT(shift_imm.type() == 1);
2618 uint32_t shift = shift_imm.encoding();
2632 void Assembler::Asr(Register rd, Register rm, const Operand& shift_imm,
2634 ASSERT(shift_imm.type() == 1);
2635 uint32_t shift = shift_imm.encoding();
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/external/pcre/dist2/src/sljit/
DsljitNativeARM_32.c1014 if (compiler->shift_imm != 0x20) { \
1018 if (compiler->shift_imm != 0) \
1020 RD(dst) | (compiler->shift_imm << 7) | (opcode << 5) | RM(src2)); \
1739 compiler->shift_imm = src2w & 0x1f; in sljit_emit_op2()
1743 compiler->shift_imm = 0x20; in sljit_emit_op2()
DsljitLir.h422 sljit_uw shift_imm; member
/external/v8/src/codegen/arm/
Dassembler-arm.cc353 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) { in Operand() argument
354 DCHECK(is_uint5(shift_imm)); in Operand()
359 shift_imm_ = shift_imm & 31; in Operand()
361 if ((shift_op == ROR) && (shift_imm == 0)) { in Operand()
367 DCHECK_EQ(shift_imm, 0); in Operand()
411 int shift_imm, AddrMode am) in MemOperand() argument
415 shift_imm_(shift_imm & 31), in MemOperand()
417 DCHECK(is_uint5(shift_imm)); in MemOperand()
Dassembler-arm.h100 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
205 explicit MemOperand(Register rn, Register rm, ShiftOp shift_op, int shift_imm,
/external/v8/src/asmjs/
Dasm-parser.cc1864 uint32_t shift_imm; in ShiftExpression() local
1865 if (a->IsA(AsmType::Intish()) && CheckForUnsigned(&shift_imm)) { in ShiftExpression()
1876 heap_access_shift_value_ = shift_imm; in ShiftExpression()
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td526 // shift_imm: An integer that encodes a shift amount and the type of shift
536 def shift_imm : Operand<i32> {
3652 (ins imm1_32:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
3681 (ins imm0_31:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrInfo.td615 // shift_imm: An integer that encodes a shift amount and the type of shift
625 def shift_imm : Operand<i32> {
3798 (ins imm1_32:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
3829 (ins imm0_31:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc775 TEST(shift_imm) { in TEST() argument
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenInstrInfo.inc11413 shift_imm = 155,