Searched refs:shifted_src (Results 1 – 2 of 2) sorted by relevance
/external/v8/src/execution/arm64/ |
D | simulator-logic-arm64.cc | 2113 LogicVRegister shifted_src = ushr(vform_src, temp, src, shift); in shrn() local 2114 return ExtractNarrow(vform_dst, dst, false, shifted_src, false); in shrn() 2122 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift); in shrn2() local 2123 return ExtractNarrow(vformdst, dst, false, shifted_src, false); in shrn2() 2131 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift).Round(vformsrc); in rshrn() local 2132 return ExtractNarrow(vformdst, dst, false, shifted_src, false); in rshrn() 2140 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift).Round(vformsrc); in rshrn2() local 2141 return ExtractNarrow(vformdst, dst, false, shifted_src, false); in rshrn2() 2254 LogicVRegister shifted_src = sshr(vformsrc, temp, src, shift); in sqshrn() local 2255 return sqxtn(vformdst, dst, shifted_src); in sqshrn() [all …]
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/external/vixl/src/aarch64/ |
D | logic-aarch64.cc | 2578 LogicVRegister shifted_src = ushr(vform_src, temp, src, shift); in shrn() local 2579 return extractnarrow(vform_dst, dst, false, shifted_src, false); in shrn() 2590 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift); in shrn2() local 2591 return extractnarrow(vformdst, dst, false, shifted_src, false); in shrn2() 2602 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift).Round(vformsrc); in rshrn() local 2603 return extractnarrow(vformdst, dst, false, shifted_src, false); in rshrn() 2614 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift).Round(vformsrc); in rshrn2() local 2615 return extractnarrow(vformdst, dst, false, shifted_src, false); in rshrn2() 2761 LogicVRegister shifted_src = sshr(vformsrc, temp, src, shift); in sqshrn() local 2762 return sqxtn(vformdst, dst, shifted_src); in sqshrn() [all …]
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