| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-scalar-extract-narrow.s | 21 sqxtn b18, h18
22 sqxtn h20, s17
23 sqxtn s19, d14
|
| D | arm64-fp-encoding.s | 703 sqxtn b4, h2
704 sqxtn h2, s3
705 sqxtn s9, d2
707 ; CHECK: sqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x5e]
708 ; CHECK: sqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x5e]
709 ; CHECK: sqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x5e]
|
| D | neon-simd-misc.s | 372 sqxtn v1.8b, v9.8h
373 sqxtn v13.4h, v21.4s
374 sqxtn v4.2s, v0.2d
|
| D | neon-diagnostics.s | 4811 sqxtn b18, b18
4812 sqxtn h20, h17
4813 sqxtn s19, s14
5633 sqxtn v0.16b, v31.8h
5634 sqxtn v2.8h, v4.4s
5635 sqxtn v6.4s, v8.2d
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-extract-narrow.s | 21 sqxtn b18, h18
22 sqxtn h20, s17
23 sqxtn s19, d14
|
| D | arm64-fp-encoding.s | 703 sqxtn b4, h2
704 sqxtn h2, s3
705 sqxtn s9, d2
707 ; CHECK: sqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x5e]
708 ; CHECK: sqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x5e]
709 ; CHECK: sqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x5e]
|
| D | neon-simd-misc.s | 372 sqxtn v1.8b, v9.8h
373 sqxtn v13.4h, v21.4s
374 sqxtn v4.2s, v0.2d
|
| D | neon-diagnostics.s | 4871 sqxtn b18, b18
4872 sqxtn h20, h17
4873 sqxtn s19, s14
5693 sqxtn v0.16b, v31.8h
5694 sqxtn v2.8h, v4.4s
5695 sqxtn v6.4s, v8.2d
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-extract-narrow.s.cs | 5 0x52,0x4a,0x21,0x5e = sqxtn b18, h18
6 0x34,0x4a,0x61,0x5e = sqxtn h20, s17
7 0xd3,0x49,0xa1,0x5e = sqxtn s19, d14
|
| D | neon-simd-misc.s.cs | 119 0x21,0x49,0x21,0x0e = sqxtn v1.8b, v9.8h
120 0xad,0x4a,0x61,0x0e = sqxtn v13.4h, v21.4s
121 0x04,0x48,0xa1,0x0e = sqxtn v4.2s, v0.2d
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vmovn.ll | 63 ;CHECK: sqxtn.8b v0, v0
65 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> %A)
72 ;CHECK: sqxtn.4h v0, v0
74 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %A)
81 ;CHECK: sqxtn.2s v0, v0
83 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqxtn.v2i32(<2 x i64> %A)
92 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> %A)
102 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %A)
112 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqxtn.v2i32(<2 x i64> %A)
117 declare <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16>) nounwind readnone
[all …]
|
| D | arm64-arith-saturating.ll | 137 ; CHECK: sqxtn s0, d0
139 %vqmovn.i = tail call i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64 %vecext) nounwind
152 declare i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64) nounwind readnone
|
| D | arm64-inline-asm.ll | 252 ; CHECK: sqxtn h0, [[SREG]]
254 tail call void asm sideeffect "sqxtn h0, ${0:s}\0A", "w"(i32 %a)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-vmovn.ll | 63 ;CHECK: sqxtn.8b v0, v0
65 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> %A)
72 ;CHECK: sqxtn.4h v0, v0
74 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %A)
81 ;CHECK: sqxtn.2s v0, v0
83 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqxtn.v2i32(<2 x i64> %A)
92 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> %A)
102 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %A)
112 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqxtn.v2i32(<2 x i64> %A)
117 declare <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16>) nounwind readnone
[all …]
|
| D | arm64-arith-saturating.ll | 137 ; CHECK: sqxtn s0, d0
139 %vqmovn.i = tail call i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64 %vecext) nounwind
152 declare i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64) nounwind readnone
|
| D | arm64-inline-asm.ll | 252 ; CHECK: sqxtn h0, [[SREG]]
254 tail call void asm sideeffect "sqxtn h0, ${0:s}\0A", "w"(i32 %a)
|
| /external/libhevc/common/arm64/ |
| D | ihevc_intra_pred_luma_mode_3_to_9.s | 170 sqxtn v1.8b, v22.8h
297 sqxtn v25.8b, v12.8h
422 sqxtn v25.8b, v14.8h
504 sqxtn v1.8b, v22.8h
|
| D | ihevc_intra_pred_filters_luma_mode_11_to_17.s | 292 sqxtn v19.8b, v22.8h
417 sqxtn v25.8b, v12.8h
543 sqxtn v25.8b, v14.8h
633 sqxtn v19.8b, v22.8h
|
| D | ihevc_intra_pred_chroma_mode_3_to_9.s | 163 sqxtn v2.8b, v22.8h
298 sqxtn v23.8b, v25.8h
427 sqxtn v23.8b, v14.8h
|
| D | ihevc_intra_pred_filters_chroma_mode_11_to_17.s | 284 sqxtn v19.8b, v22.8h
420 sqxtn v25.8b, v12.8h
562 sqxtn v25.8b, v14.8h
|
| D | ihevc_deblk_luma_vert.s | 485 sqxtn v16.8b,v16.8h
532 sqxtn v16.8b,v16.8h
590 sqxtn v3.8b,v2.8h
|
| D | ihevc_deblk_luma_horz.s | 495 sqxtn v10.8b, v10.8h
|
| /external/v8/src/execution/arm64/ |
| D | simulator-logic-arm64.cc | 1814 LogicVRegister Simulator::sqxtn(VectorFormat vform, LogicVRegister dst, in sqxtn() function in v8::internal::Simulator
2255 return sqxtn(vformdst, dst, shifted_src); in sqshrn()
2264 return sqxtn(vformdst, dst, shifted_src); in sqshrn2()
2273 return sqxtn(vformdst, dst, shifted_src); in sqrshrn()
2282 return sqxtn(vformdst, dst, shifted_src); in sqrshrn2()
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 2008 LogicVRegister Simulator::sqxtn(VectorFormat vform, in sqxtn() function in vixl::aarch64::Simulator
2762 return sqxtn(vformdst, dst, shifted_src); in sqshrn()
2774 return sqxtn(vformdst, dst, shifted_src); in sqshrn2()
2786 return sqxtn(vformdst, dst, shifted_src); in sqrshrn()
2798 return sqxtn(vformdst, dst, shifted_src); in sqrshrn2()
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1462 0x~~~~~~~~~~~~~~~~ 5e214b5b sqxtn b27, h26
1463 0x~~~~~~~~~~~~~~~~ 5e614971 sqxtn h17, s11
1464 0x~~~~~~~~~~~~~~~~ 5ea14bf6 sqxtn s22, d31
1465 0x~~~~~~~~~~~~~~~~ 0ea148ba sqxtn v26.2s, v5.2d
1466 0x~~~~~~~~~~~~~~~~ 0e6148ed sqxtn v13.4h, v7.4s
1467 0x~~~~~~~~~~~~~~~~ 0e214a73 sqxtn v19.8b, v19.8h
|