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Searched refs:src_mask (Results 1 – 20 of 20) sorted by relevance

/external/iptables/extensions/
Dlibxt_HMARK.c81 .flags = XTOPT_PUT, XTOPT_POINTER(hi, src_mask)
150 memset(&info->src_mask, 0xff, sizeof(info->src_mask)); in hmark_parse()
325 xtables_ip6mask_to_numeric(&info->src_mask.in6) + 1); in HMARK_ip6_print()
346 xtables_ipmask_to_cidr(&info->src_mask.in)); in HMARK_ip4_print()
391 ret = xtables_ip6mask_to_cidr(&info->src_mask.in6); in HMARK_ip6_save()
408 ret = xtables_ipmask_to_cidr(&info->src_mask.in); in HMARK_ip4_save()
Dlibxt_devgroup.c49 info->src_mask = mask; in devgroup_parse()
71 xtables_print_val_mask(info->src_group, info->src_mask, in devgroup_show()
139 info->src_mask, xl, numeric); in devgroup_show_xlate()
/external/tcpdump/
Dprint-cnfp.c117 uint8_t src_mask; /* source address mask bits */ member
151 uint8_t src_mask; /* source address mask bits */ member
296 snprintf(buf, sizeof(buf), "/%u", nr->src_mask); in cnfp_v5_print()
392 snprintf(buf, sizeof(buf), "/%u", nr->src_mask); in cnfp_v6_print()
/external/libunwind/src/ia64/
DGrbs.c203 unw_word_t n, src_mask, dst_mask, bsp, *dst, src_rnat, dst_rnat = 0; in rbs_cover_and_flush() local
289 src_mask = ((unw_word_t) 1) << rse_slot_num (bsp); in rbs_cover_and_flush()
292 if (src_rnat & src_mask) in rbs_cover_and_flush()
/external/kernel-headers/original/uapi/linux/netfilter/
Dxt_devgroup.h17 __u32 src_mask; member
Dxt_HMARK.h41 union nf_inet_addr src_mask; member
/external/iptables/include/linux/netfilter/
Dxt_devgroup.h16 __u32 src_mask; member
Dxt_HMARK.h39 union nf_inet_addr src_mask; member
/external/mesa3d/src/mesa/program/
Dprog_optimize.c121 get_dst_mask_for_mov(const struct prog_instruction *mov, GLuint src_mask) in get_dst_mask_for_mov() argument
134 if ((src_mask & (1 << src_comp)) == 0) in get_dst_mask_for_mov()
487 GLuint dst_mask, src_mask; in _mesa_remove_extra_move_use() local
495 src_mask = get_src_arg_mask(mov, 0, NO_MASK); in _mesa_remove_extra_move_use()
544 src_mask = get_src_arg_mask(mov, 0, dst_mask); in _mesa_remove_extra_move_use()
551 src_mask &= ~inst2->DstReg.WriteMask; in _mesa_remove_extra_move_use()
552 dst_mask &= get_dst_mask_for_mov(mov, src_mask); in _mesa_remove_extra_move_use()
/external/mesa3d/src/gallium/auxiliary/util/
Du_surface.c499 uint64_t src_mask; in util_fill_zs_rect() local
502 src_mask = 0x00000000ffffffffull; in util_fill_zs_rect()
504 src_mask = 0x000000ff00000000ull; in util_fill_zs_rect()
509 uint64_t tmp = *row & ~src_mask; in util_fill_zs_rect()
510 *row++ = tmp | (zstencil & src_mask); in util_fill_zs_rect()
/external/vulkan-validation-layers/tests/
Dvkrenderframework.cpp1035 VkFlags src_mask, dst_mask; in SetLayout() local
1050 src_mask = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; in SetLayout()
1052 src_mask = VK_ACCESS_TRANSFER_WRITE_BIT; in SetLayout()
1058 src_mask = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; in SetLayout()
1060 src_mask = VK_ACCESS_INPUT_ATTACHMENT_READ_BIT; in SetLayout()
1062 src_mask = VK_ACCESS_TRANSFER_WRITE_BIT; in SetLayout()
1068 src_mask = VK_ACCESS_TRANSFER_WRITE_BIT; in SetLayout()
1070 src_mask = VK_ACCESS_INPUT_ATTACHMENT_READ_BIT; in SetLayout()
1076 src_mask = VK_ACCESS_TRANSFER_READ_BIT; in SetLayout()
1078 src_mask = 0; in SetLayout()
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/external/mesa3d/src/gallium/drivers/lima/ir/pp/
Dnir.c180 unsigned src_mask; in ppir_emit_alu() local
183 src_mask = 0b0111; in ppir_emit_alu()
186 src_mask = 0b1111; in ppir_emit_alu()
189 src_mask = pd->write_mask; in ppir_emit_alu()
200 ppir_node_add_src(block->comp, &node->node, ps, &ns->src, src_mask); in ppir_emit_alu()
/external/mesa3d/src/gallium/drivers/llvmpipe/
Dlp_state_fs.c2256 LLVMValueRef src_mask[4 * 4]; in generate_unswizzled_blend() local
2443 src_mask[i*2 + 0] = lp_build_extract_range(gallivm, fs_mask[i], in generate_unswizzled_blend()
2445 src_mask[i*2 + 1] = lp_build_extract_range(gallivm, fs_mask[i], in generate_unswizzled_blend()
2452 src_mask[i] = fs_mask[i]; in generate_unswizzled_blend()
2654 lp_bld_quad_twiddle(gallivm, mask_type, &src_mask[0], block_height, &src_mask[0]); in generate_unswizzled_blend()
2657 lp_build_concat_n(gallivm, mask_type, src_mask, 4, src_mask, src_count); in generate_unswizzled_blend()
2663 src_mask[idx] = lp_build_extract_range(gallivm, src_mask[(idx * pixels) / 4], in generate_unswizzled_blend()
2685 src_mask[i] = LLVMBuildIntCast(builder, src_mask[i], in generate_unswizzled_blend()
2692 src_mask[i] = LLVMBuildBitCast(builder, src_mask[i], in generate_unswizzled_blend()
2694 src_mask[i] = lp_build_pad_vector(gallivm, src_mask[i], row_type.length); in generate_unswizzled_blend()
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/external/mesa3d/src/compiler/nir/
Dnir_format_convert.h48 uint32_t src_mask, int src_left_shift) in nir_mask_shift_or() argument
50 return nir_ior(b, nir_mask_shift(b, src, src_mask, src_left_shift), dst); in nir_mask_shift_or()
/external/u-boot/arch/arm/mach-exynos/
Dclock.c22 int32_t src_mask; member
433 src = (src >> bit_info->src_bit) & bit_info->src_mask; in exynos5_get_periph_rate()
524 src = (src >> bit_info->src_bit) & bit_info->src_mask; in exynos542x_get_periph_rate()
/external/mesa3d/src/intel/vulkan/
Danv_blorp.c331 VkImageAspectFlags src_mask = region->srcSubresource.aspectMask, in copy_image() local
334 assert(anv_image_aspects_compatible(src_mask, dst_mask)); in copy_image()
336 if (util_bitcount(src_mask) > 1) { in copy_image()
338 anv_foreach_image_aspect_bit(aspect_bit, src_image, src_mask) { in copy_image()
379 get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, src_mask, in copy_image()
/external/mesa3d/src/freedreno/vulkan/
Dtu_cmd_buffer.c2451 enum tu_cmd_access_mask src_mask, in tu_flush_for_access() argument
2456 if (src_mask & TU_ACCESS_HOST_WRITE) { in tu_flush_for_access()
2461 if (src_mask & TU_ACCESS_SYSMEM_WRITE) { in tu_flush_for_access()
2468 if (src_mask & TU_ACCESS_CP_WRITE) { in tu_flush_for_access()
2479 if (src_mask & TU_ACCESS_##domain##_WRITE) { \ in tu_flush_for_access()
2491 if (src_mask & TU_ACCESS_##domain##_INCOHERENT_WRITE) { \ in tu_flush_for_access()
/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_query_hw_sm.c600 uint32_t src_mask; /* mask for signal selection (only for NVC0:NVE4) */ member
2445 mask_sel &= cfg->ctr[i].src_mask; in nvc0_hw_sm_begin_query()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_lowering.c113 const struct tgsi_full_src_register *src, unsigned src_mask) in aliases() argument
121 if (src_mask & (1 << i)) in aliases()
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp11341 std::pair<Temp, Temp> ngg_gs_workgroup_reduce_and_scan(isel_context *ctx, Temp src_mask) in ngg_gs_workgroup_reduce_and_scan() argument
11357 assert(src_mask.regClass() == bld.lm); in ngg_gs_workgroup_reduce_and_scan()
11360 Temp sg_reduction = bld.sop1(Builder::s_bcnt1_i32, bld.def(s1), bld.def(s1, scc), src_mask); in ngg_gs_workgroup_reduce_and_scan()
11361 Temp sg_excl = emit_mbcnt(ctx, bld.tmp(v1), Operand(src_mask)); in ngg_gs_workgroup_reduce_and_scan()