/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | stdux-constuse.ll | 34 ; CHECK-NEXT: stdx 35 ; CHECK-NEXT: stdx 36 ; CHECK-NEXT: stdx
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D | fast-isel-load-store.ll | 181 ;; std requires an offset divisible by 4, so we need stdx here. 190 ; ELF64: stdx 206 ;; std requires an offset that fits in 16 bits, so we need stdx here. 216 ; ELF64: stdx
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D | unal4-std.ll | 18 ; CHECK: stdx {{[0-9]+}}, 0,
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D | tls-pie-xform.ll | 135 ; CHECK-NEXT: stdx 3, 4, var_long_long@tls 148 ; CHECK: stdx {{[0-9]+}}, 4, var_long_long@tls
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D | unaligned.ll | 93 ; CHECK: stdx
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D | atomics-indexed.ll | 82 ; PPC64: stdx
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D | peephole-align.ll | 246 ; CHECK: stdx [[REG0_1]], [[REGSTRUCT]], [[OFFSET_REG]]
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/external/llvm/test/CodeGen/PowerPC/ |
D | stdux-constuse.ll | 34 ; CHECK-NEXT: stdx 35 ; CHECK-NEXT: stdx 36 ; CHECK-NEXT: stdx
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D | fast-isel-load-store.ll | 168 ;; std requires an offset divisible by 4, so we need stdx here. 177 ; ELF64: stdx 193 ;; std requires an offset that fits in 16 bits, so we need stdx here. 203 ; ELF64: stdx
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D | unaligned.ll | 92 ; CHECK-DAG: stdx 93 ; CHECK: stdx
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D | unal4-std.ll | 18 ; CHECK: stdx {{[0-9]+}}, 0,
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D | atomics-indexed.ll | 76 ; PPC64: stdx
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D | peephole-align.ll | 328 ; POWER7: stdx [[REG0_1]], [[REGSTRUCT]], [[OFFSET_REG]]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-tls-relocs-01.s | 16 stdx 4, 3, t@tls
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D | ppc64-encoding.s | 286 # CHECK-BE: stdx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2a] 287 # CHECK-LE: stdx 2, 3, 4 # encoding: [0x2a,0x21,0x43,0x7c] 288 stdx 2, 3, 4
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding.s.cs | 57 0x7c,0x43,0x21,0x2a = stdx 2, 3, 4
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/external/linux-kselftest/tools/testing/selftests/powerpc/alignment/ |
D | alignment_handler.c | 96 #define LOAD_XFORM_TEST(op) TEST(op, op, stdx, XFORM, 31, 31) 399 STORE_XFORM_TEST(stdx); in test_alignment_handler_integer()
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding.s | 245 # CHECK-BE: stdx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2a] 246 # CHECK-LE: stdx 2, 3, 4 # encoding: [0x2a,0x21,0x43,0x7c] 247 stdx 2, 3, 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64le-encoding.txt | 193 # CHECK: stdx 2, 3, 4
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D | ppc64-encoding.txt | 196 # CHECK: stdx 2, 3, 4
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding.txt | 196 # CHECK: stdx 2, 3, 4
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D | ppc64le-encoding.txt | 193 # CHECK: stdx 2, 3, 4
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 531 "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64, 629 "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64, 1211 "stdx $rS, $dst", IIC_LdStSTD,
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/external/v8/src/codegen/ppc/ |
D | macro-assembler-ppc.h | 43 #define StorePX stdx
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/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 2094 ASSEMBLE_STORE_INTEGER(std, stdx); in AssembleArchInstruction() 3243 __ stdx(ip, MemOperand(r0, sp)); in AssembleArchInstruction() local 3245 __ stdx(r0, MemOperand(ip, sp)); in AssembleArchInstruction() local
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