/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-atomic-128.ll | 29 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 44 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 59 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 74 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 95 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 116 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 137 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 158 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 194 ; CHECK: stlxp [[SUCCESS:w[0-9]+]], x0, x1, [x2] 206 ; CHECK: stlxp [[SUCCESS:w[0-9]+]], x0, x1, [x2]
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D | cmpxchg-O0.ll | 76 ; CHECK: stlxp [[STATUS:w[0-9]+]], x4, x5, [x0] 101 ; CHECK: stlxp [[STATUS:w[0-9]+]], [[NEW_LO]], [[NEW_HI]], [x0]
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D | arm64-ldxr-stxr.ll | 160 ; CHECK: stlxp {{w[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, [x0] 165 %strexd = tail call i32 @llvm.aarch64.stlxp(i64 %tmp4, i64 %tmp7, i8* %ptr) 170 declare i32 @llvm.aarch64.stlxp(i64, i64, i8*) nounwind
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-atomic-128.ll | 29 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 44 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 59 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 74 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 95 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 116 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 137 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 158 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0] 194 ; CHECK: stlxp [[SUCCESS:w[0-9]+]], x0, x1, [x2] 206 ; CHECK: stlxp [[SUCCESS:w[0-9]+]], x0, x1, [x2]
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D | arm64-ldxr-stxr.ll | 160 ; CHECK: stlxp {{w[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, [x0] 165 %strexd = tail call i32 @llvm.aarch64.stlxp(i64 %tmp4, i64 %tmp7, i8* %ptr) 170 declare i32 @llvm.aarch64.stlxp(i64, i64, i8*) nounwind
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D | cmpxchg-O0.ll | 70 ; CHECK: stlxp [[STATUS:w[0-9]+]], x4, x5, [x0]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 528 stlxp w1, x2, x6, [x7] 529 stlxp w1, w2, w6, [x9] 535 ; CHECK: stlxp w1, x2, x6, [x7] ; encoding: [0xe2,0x98,0x21,0xc8] 536 ; CHECK: stlxp w1, w2, w6, [x9] ; encoding: [0x22,0x99,0x21,0x88]
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D | basic-a64-diagnostics.s | 1907 stlxp w5, x1, w4, [x5] 1912 stlxp w17, w6, x7, [x22]
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D | basic-a64-instructions.s | 2286 stlxp wzr, w22, w23, [x24] 2287 stlxp w25, x26, x27, [sp] 2314 stlxp wzr, w22, w23, [x24,#0]
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/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 528 stlxp w1, x2, x6, [x1] 529 stlxp w1, w2, w6, [x1] 535 ; CHECK: stlxp w1, x2, x6, [x1] ; encoding: [0x22,0x98,0x21,0xc8] 536 ; CHECK: stlxp w1, w2, w6, [x1] ; encoding: [0x22,0x98,0x21,0x88]
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D | basic-a64-diagnostics.s | 1884 stlxp w5, x1, w4, [x5] 1889 stlxp w17, w6, x7, [x22]
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D | basic-a64-instructions.s | 2303 stlxp wzr, w22, w23, [x24] 2304 stlxp w25, x26, x27, [sp] 2331 stlxp wzr, w22, w23, [x24,#0]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 516 # CHECK: stlxp w1, x2, x6, [x1] 517 # CHECK: stlxp w1, w2, w6, [x1]
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D | basic-a64-instructions.txt | 1977 #CHECK: stlxp w4, w5, w6, [sp] 1978 #CHECK: stlxp wzr, x6, x7, [x1]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 516 # CHECK: stlxp w1, x2, x6, [x1] 517 # CHECK: stlxp w1, w2, w6, [x1]
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D | basic-a64-instructions.txt | 1961 #CHECK: stlxp w4, w5, w6, [sp] 1962 #CHECK: stlxp wzr, x6, x7, [x1]
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/external/vixl/ |
D | README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 1598 COMPARE(stlxp(w27, w28, w29, MemOperand(x30)), "stlxp w27, w28, w29, [x30]"); in TEST() 1599 COMPARE(stlxp(x0, w1, w2, MemOperand(sp)), "stlxp w0, w1, w2, [sp]"); in TEST() 1600 COMPARE(stlxp(w3, x4, x5, MemOperand(x6)), "stlxp w3, x4, x5, [x6]"); in TEST() 1601 COMPARE(stlxp(x7, x8, x9, MemOperand(sp)), "stlxp w7, x8, x9, [sp]"); in TEST()
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D | test-trace-aarch64.cc | 295 __ stlxp(w24, w25, w26, MemOperand(x0)); in GenerateTestSequenceBase() local 296 __ stlxp(x27, x28, x29, MemOperand(x0)); in GenerateTestSequenceBase() local
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 896 0x16,0xdf,0x3f,0x88 = stlxp wzr, w22, w23, [x24] 897 0xfa,0xef,0x39,0xc8 = stlxp w25, x26, x27, [sp] 908 0x16,0xdf,0x3f,0x88 = stlxp wzr, w22, w23, [x24]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 1390 void stlxp(const Register& rs,
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D | macro-assembler-aarch64.h | 2338 stlxp(rs, rt, rt2, dst); in Stlxp()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 242 0x~~~~~~~~~~~~~~~~ 8838e819 stlxp w24, w25, w26, [x0] 243 0x~~~~~~~~~~~~~~~~ c83bf41c stlxp w27, x28, x29, [x0]
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D | log-disasm-colour | 242 0x~~~~~~~~~~~~~~~~ 8838e819 stlxp w24, w25, w26, [x0] 243 0x~~~~~~~~~~~~~~~~ c83bf41c stlxp w27, x28, x29, [x0]
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D | log-cpufeatures-custom | 242 0x~~~~~~~~~~~~~~~~ 8838e819 stlxp w24, w25, w26, [x0] 243 0x~~~~~~~~~~~~~~~~ c83bf41c stlxp w27, x28, x29, [x0]
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