| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | load-store-left-right.ll | 60 ; MIPS32-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
63 ; MIPS32-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
69 ; MIPS64-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
72 ; MIPS64R2-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
75 ; MIPS64-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
78 ; MIPS64R2-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
209 ; MIPS32-EL-DAG: swl $[[A1:4]], 3($[[R1:[0-9]+]])
211 ; MIPS32-EL-DAG: swl $[[A2:5]], 7($[[R1:[0-9]+]])
214 ; MIPS32-EB-DAG: swl $[[A1:4]], 0($[[R1:[0-9]+]])
216 ; MIPS32-EB-DAG: swl $[[A1:5]], 4($[[R1:[0-9]+]])
[all …]
|
| D | swzero.ll | 7 ; CHECK: swl $zero
|
| D | unaligned-memops-mapping.mir | 117 # CHECK: 8: 60 25 80 00 swl $1, 0($5)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | mips-expansions.s | 1141 # CHECK-BE: swl $8, 0($zero) # encoding: [0xa8,0x08,0x00,0x00]
1143 # CHECK-LE: swl $8, 3($zero) # encoding: [0x03,0x00,0x08,0xa8]
1147 # CHECK-BE: swl $8, 2($zero) # encoding: [0xa8,0x08,0x00,0x02]
1149 # CHECK-LE: swl $8, 5($zero) # encoding: [0x05,0x00,0x08,0xa8]
1156 # CHECK-BE: swl $8, 0($1) # encoding: [0xa8,0x28,0x00,0x00]
1160 # CHECK-LE: swl $8, 3($1) # encoding: [0x03,0x00,0x28,0xa8]
1164 # CHECK-BE: swl $8, -32768($zero) # encoding: [0xa8,0x08,0x80,0x00]
1166 # CHECK-LE: swl $8, -32765($zero) # encoding: [0x03,0x80,0x08,0xa8]
1173 # CHECK-BE: swl $8, 0($1) # encoding: [0xa8,0x28,0x00,0x00]
1177 # CHECK-LE: swl $8, 3($1) # encoding: [0x03,0x00,0x28,0xa8]
[all …]
|
| D | micromips-loadstore-unaligned.s | 14 # CHECK-EL: swl $4, 16($5) # encoding: [0x85,0x60,0x10,0x80]
21 # CHECK-EB: swl $4, 16($5) # encoding: [0x60,0x85,0x80,0x10]
25 swl $4, 16($5)
|
| D | mips-memory-instructions.s | 13 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
20 swl $4, 16($5)
|
| D | nacl-mask.s | 118 swl $4, 0($6)
149 # CHECK-NEXT: swl $4, 0($6)
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-loadstore-unaligned.s | 14 # CHECK-EL: swl $4, 16($5) # encoding: [0x85,0x60,0x10,0x80]
21 # CHECK-EB: swl $4, 16($5) # encoding: [0x60,0x85,0x80,0x10]
25 swl $4, 16($5)
|
| D | mips-memory-instructions.s | 13 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
20 swl $4, 16($5)
|
| D | nacl-mask.s | 118 swl $4, 0($6)
149 # CHECK-NEXT: swl $4, 0($6)
|
| /external/llvm/test/CodeGen/Mips/ |
| D | load-store-left-right.ll | 54 ; MIPS32-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
57 ; MIPS32-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
63 ; MIPS64-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
66 ; MIPS64-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
177 ; MIPS32-EL-DAG: swl $[[A1:4]], 3($[[R1:[0-9]+]])
179 ; MIPS32-EL-DAG: swl $[[A2:5]], 7($[[R1:[0-9]+]])
182 ; MIPS32-EB-DAG: swl $[[A1:4]], 0($[[R1:[0-9]+]])
184 ; MIPS32-EB-DAG: swl $[[A1:5]], 4($[[R1:[0-9]+]])
208 ; MIPS32-EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
211 ; MIPS32-EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
[all …]
|
| D | swzero.ll | 7 ; CHECK: swl $zero
|
| /external/capstone/suite/MC/Mips/ |
| D | micromips-loadstore-unaligned.s.cs | 4 0x85,0x60,0x10,0x80 = swl $4, 16($5)
|
| D | micromips-loadstore-unaligned-EB.s.cs | 4 0x60,0x85,0x80,0x10 = swl $4, 16($5)
|
| D | mips-memory-instructions.s.cs | 8 0x10,0x00,0xa4,0xa8 = swl $4, 16($5)
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips1-wrong-error.s | 12 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| D | invalid-mips3-wrong-error.s | 18 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips1-wrong-error.s | 12 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| D | invalid-mips3-wrong-error.s | 18 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1-wrong-error.s | 12 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1-wrong-error.s | 12 …swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | valid.s | 118 swl $15,13694($s3)
169 swl $3, %lo(g_8)($2) # CHECK: encoding: [0xa8,0x43,A,A]
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 146 swl $15,13694($s3)
196 swl $3, %lo(g_8)($2) # CHECK: encoding: [0xa8,0x43,A,A]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
| D | invalid-wrong-error.s | 34 swl $4, 1($5) # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 175 swl $15,13694($s3)
226 swl $3, %lo(g_8)($2) # CHECK: encoding: [0xa8,0x43,A,A]
|