Home
last modified time | relevance | path

Searched refs:sxtab16 (Results 1 – 25 of 32) sorted by relevance

12

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s6 sxtab16 r0, r0, r0 label
16 @ CHECK-7EM: sxtab16 r0, r0, r0 @ encoding: [0x20,0xfa,0x80,0xf0]
Dbasic-thumb2-instructions.s3151 sxtab16 r6, r2, r7, ror #0
3152 sxtab16 r3, r5, r8, ror #8
3153 sxtab16 r3, r2, r1, ror #16
3158 @ CHECK: sxtab16 r6, r2, r7 @ encoding: [0x22,0xfa,0x87,0xf6]
3159 @ CHECK: sxtab16 r3, r5, r8, ror #8 @ encoding: [0x25,0xfa,0x98,0xf3]
3160 @ CHECK: sxtab16 r3, r2, r1, ror #16 @ encoding: [0x22,0xfa,0xa1,0xf3]
Dbasic-arm-instructions.s3048 sxtab16 r6, r2, r7, ror #0
3049 sxtab16 r3, r5, r8, ror #8
3050 sxtab16 r3, r2, r1, ror #16
3054 @ CHECK: sxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0x82,0xe6]
3055 @ CHECK: sxtab16 r3, r5, r8, ror #8 @ encoding: [0x78,0x34,0x85,0xe6]
3056 @ CHECK: sxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0x82,0xe6]
/external/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s6 sxtab16 r0, r0, r0 label
16 @ CHECK-7EM: sxtab16 r0, r0, r0 @ encoding: [0x20,0xfa,0x80,0xf0]
Dbasic-arm-instructions.s3046 sxtab16 r6, r2, r7, ror #0
3047 sxtab16 r3, r5, r8, ror #8
3048 sxtab16 r3, r2, r1, ror #16
3052 @ CHECK: sxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0x82,0xe6]
3053 @ CHECK: sxtab16 r3, r5, r8, ror #8 @ encoding: [0x78,0x34,0x85,0xe6]
3054 @ CHECK: sxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0x82,0xe6]
Dbasic-thumb2-instructions.s3095 sxtab16 r6, r2, r7, ror #0
3096 sxtab16 r3, r5, r8, ror #8
3097 sxtab16 r3, r2, r1, ror #16
3102 @ CHECK: sxtab16 r6, r2, r7 @ encoding: [0x22,0xfa,0x87,0xf6]
3103 @ CHECK: sxtab16 r3, r5, r8, ror #8 @ encoding: [0x25,0xfa,0x98,0xf3]
3104 @ CHECK: sxtab16 r3, r2, r1, ror #16 @ encoding: [0x22,0xfa,0xa1,0xf3]
/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt31 # CHECK: sxtab16
Dthumb2.txt2123 # CHECK: sxtab16 r6, r2, r7
2124 # CHECK: sxtab16 r3, r5, r8, ror #8
2125 # CHECK: sxtab16 r3, r2, r1, ror #16
Dbasic-arm-instructions.txt2062 # CHECK: sxtab16 r6, r2, r7
2063 # CHECK: sxtab16 r3, r5, r8, ror #8
2064 # CHECK: sxtab16 r3, r2, r1, ror #16
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt31 # CHECK: sxtab16
Dbasic-arm-instructions.txt2062 # CHECK: sxtab16 r6, r2, r7
2063 # CHECK: sxtab16 r3, r5, r8, ror #8
2064 # CHECK: sxtab16 r3, r2, r1, ror #16
Dthumb2.txt2123 # CHECK: sxtab16 r6, r2, r7
2124 # CHECK: sxtab16 r3, r5, r8, ror #8
2125 # CHECK: sxtab16 r3, r2, r1, ror #16
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dacle-intrinsics.ll61 ; CHECK: sxtab16 r0, r0, r1
65 %tmp = call i32 @llvm.arm.sxtab16(i32 %a, i32 %b)
427 declare i32 @llvm.arm.sxtab16(i32, i32)
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs853 0x77,0x60,0x82,0xe6 = sxtab16 r6, r2, r7
854 0x78,0x34,0x85,0xe6 = sxtab16 r3, r5, r8, ror #8
855 0x71,0x38,0x82,0xe6 = sxtab16 r3, r2, r1, ror #16
Dbasic-thumb2-instructions.s.cs1001 0x22,0xfa,0x87,0xf6 = sxtab16 r6, r2, r7
1002 0x25,0xfa,0x98,0xf3 = sxtab16 r3, r5, r8, ror #8
1003 0x22,0xfa,0xa1,0xf3 = sxtab16 r3, r2, r1, ror #16
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-operand-rm-a32.cc73 M(sxtab16) \
Dtest-assembler-cond-rd-rn-operand-rm-t32.cc73 M(sxtab16) \
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc53 M(sxtab16) \
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc53 M(sxtab16) \
/external/vixl/src/aarch32/
Dassembler-aarch32.h3550 void sxtab16(Condition cond,
3554 void sxtab16(Register rd, Register rn, const Operand& operand) { in sxtab16() function
3555 sxtab16(al, rd, rn, operand); in sxtab16()
Ddisasm-aarch32.h1330 void sxtab16(Condition cond,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc7764 "xtab\007sxtab16\005sxtah\004sxtb\006sxtb16\004sxth\003tbb\003tbh\003teq"
8969 …{ 1463 /* sxtab16 */, ARM::t2SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feat…
8970 …{ 1463 /* sxtab16 */, ARM::SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Featur…
8971 …{ 1463 /* sxtab16 */, ARM::t2SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Fea…
8972 …{ 1463 /* sxtab16 */, ARM::SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Featu…
12204 { Feature_HasDSP|Feature_IsThumb2, 1463 /* sxtab16 */, MCK_RotImm, 16 /* 4 */ },
12205 { Feature_IsARM|Feature_HasV6, 1463 /* sxtab16 */, MCK_RotImm, 16 /* 4 */ },
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td1981 def t2SXTAB16 : T2I_exta_rrot_np<0b010, "sxtab16">;
4677 def : InstAlias<"sxtab16${p} $Rd, $Rn, $Rm",
DARMInstrInfo.td3405 def SXTAB16 : AI_exta_rrot_np<0b01101000, "sxtab16">;
5645 def : ARMInstAlias<"sxtab16${p} $Rd, $Rn, $Rm",
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td1984 def t2SXTAB16 : T2I_exta_rrot<0b010, "sxtab16">;
4677 def : InstAlias<"sxtab16${p} $Rd, $Rn, $Rm",

12