| /external/llvm/test/MC/AArch64/ |
| D | neon-sxtl.s | 8 sxtl v0.8h, v1.8b
9 sxtl v0.4s, v1.4h
10 sxtl v0.2d, v1.2s
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-sxtl.s | 8 sxtl v0.8h, v1.8b
9 sxtl v0.4s, v1.4h
10 sxtl v0.2d, v1.2s
|
| /external/libxaac/decoder/armv8/ |
| D | ixheaacd_cos_sin_mod_loop2.s | 72 sxtl v0.4s, v0.4h
73 sxtl v1.4s, v1.4h
172 sxtl v0.4s, v0.4h
173 sxtl v1.4s, v1.4h
|
| /external/libmpeg2/common/armv8/ |
| D | impeg2_idct.s | 240 sxtl v8.4s, v2.4h
241 sxtl v10.4s, v3.4h
250 sxtl v8.4s, v2.4h
251 sxtl v10.4s, v3.4h
260 sxtl v8.4s, v2.4h
261 sxtl v10.4s, v3.4h
270 sxtl v8.4s, v2.4h
271 sxtl v10.4s, v3.4h
280 sxtl v8.4s, v2.4h
281 sxtl v10.4s, v3.4h
[all …]
|
| /external/libhevc/common/arm64/ |
| D | ihevc_intra_pred_luma_vert.s | 205 sxtl v0.8h, v26.8b
340 sxtl v26.8h, v26.8b
|
| D | ihevc_deblk_luma_vert.s | 499 sxtl v16.8h, v20.8b
541 sxtl v16.8h, v16.8b
600 sxtl v2.8h, v3.8b
|
| D | ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 120 sxtl v0.8h, v0.8b //long the value
|
| D | ihevc_inter_pred_chroma_vert_w16inp.s | 120 sxtl v0.8h, v0.8b //long the value
|
| D | ihevc_inter_pred_filters_luma_vert_w16inp.s | 127 sxtl v0.8h, v0.8b
|
| D | ihevc_inter_pred_luma_vert_w16inp_w16out.s | 136 sxtl v0.8h,v0.8b
|
| /external/v8/src/execution/arm64/ |
| D | simulator-logic-arm64.cc | 1352 LogicVRegister extendedreg = sxtl(vform, temp2, src); in sshll()
2073 LogicVRegister Simulator::sxtl(VectorFormat vform, LogicVRegister dst, in sxtl() function in v8::internal::Simulator
2363 sxtl(vform, temp1, src1); in saddl()
2364 sxtl(vform, temp2, src2); in saddl()
2383 sxtl(vform, temp, src2); in saddw()
2439 sxtl(vform, temp1, src1); in ssubl()
2440 sxtl(vform, temp2, src2); in ssubl()
2459 sxtl(vform, temp, src2); in ssubw()
2497 sxtl(vform, temp1, src1); in sabal()
2498 sxtl(vform, temp2, src2); in sabal()
[all …]
|
| D | simulator-arm64.h | 1772 LogicVRegister sxtl(VectorFormat vform, LogicVRegister dst,
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 1468 LogicVRegister extendedreg = sxtl(vform, temp2, src); in sshll()
2530 LogicVRegister Simulator::sxtl(VectorFormat vform, in sxtl() function in vixl::aarch64::Simulator
2901 sxtl(vform, temp1, src1); in saddl()
2902 sxtl(vform, temp2, src2); in saddl()
2925 sxtl(vform, temp, src2); in saddw()
2993 sxtl(vform, temp1, src1); in ssubl()
2994 sxtl(vform, temp2, src2); in ssubl()
3017 sxtl(vform, temp, src2); in ssubw()
3063 sxtl(vform, temp1, src1); in sabal()
3064 sxtl(vform, temp2, src2); in sabal()
[all …]
|
| D | simulator-aarch64.h | 2433 LogicVRegister sxtl(VectorFormat vform,
|
| D | assembler-aarch64.h | 3006 void sxtl(const VRegister& vd, const VRegister& vn);
|
| /external/libavc/common/armv8/ |
| D | ih264_weighted_bi_pred_av8.s | 441 sxtl v6.8h, v6.8b
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4863 // Vector shift sxtl aliases
4864 def : InstAlias<"sxtl.8h $dst, $src1",
4866 def : InstAlias<"sxtl $dst.8h, $src1.8b",
4868 def : InstAlias<"sxtl.4s $dst, $src1",
4870 def : InstAlias<"sxtl $dst.4s, $src1.4h",
4872 def : InstAlias<"sxtl.2d $dst, $src1",
4874 def : InstAlias<"sxtl $dst.2d, $src1.2s",
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 5233 // Vector shift sxtl aliases
5234 def : InstAlias<"sxtl.8h $dst, $src1",
5236 def : InstAlias<"sxtl $dst.8h, $src1.8b",
5238 def : InstAlias<"sxtl.4s $dst, $src1",
5240 def : InstAlias<"sxtl $dst.4s, $src1.4h",
5242 def : InstAlias<"sxtl.2d $dst, $src1",
5244 def : InstAlias<"sxtl $dst.2d, $src1.2s",
|
| /external/v8/src/codegen/arm64/ |
| D | macro-assembler-arm64.h | 311 V(sxtl, Sxtl) \
|
| D | assembler-arm64.h | 1949 void sxtl(const VRegister& vd, const VRegister& vn);
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1792 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s
1793 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h
1794 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b
|
| D | log-disasm-colour | 1792 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s
1793 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h
1794 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b
|
| D | log-cpufeatures-custom | 1791 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s ### {NEON} ###
1792 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h ### {NEON} ###
1793 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b ### {NEON} ###
|
| D | log-cpufeatures | 1791 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s // Needs: NEON
1792 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h // Needs: NEON
1793 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b // Needs: NEON
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2129 __ sxtl(v16.V2D(), v20.V2S()); in GenerateTestSequenceNEON() local
2130 __ sxtl(v27.V4S(), v28.V4H()); in GenerateTestSequenceNEON() local
2131 __ sxtl(v0.V8H(), v22.V8B()); in GenerateTestSequenceNEON() local
|