Searched refs:t_rp (Results 1 – 6 of 6) sorted by relevance
| /external/arm-trusted-firmware/plat/intel/soc/agilex/soc/ |
| D | agilex_memory_controller.c | 178 t_rtp, t_rp, t_rcd, rd_latency, tw_rin_clk_cycles, in configure_ddr_sched_ctrl_regs() local
228 t_rp = PCH_TO_VALID(data); in configure_ddr_sched_ctrl_regs()
258 rd_to_miss = t_rtp + t_rp + t_rcd - burst_len_sched_clk; in configure_ddr_sched_ctrl_regs()
260 / 2) - rd_to_wr + t_rp + t_rcd; in configure_ddr_sched_ctrl_regs()
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| /external/arm-trusted-firmware/plat/intel/soc/stratix10/soc/ |
| D | s10_memory_controller.c | 207 t_rtp, t_rp, t_rcd, rd_latency, tw_rin_clk_cycles, in configure_ddr_sched_ctrl_regs() local
257 t_rp = PCH_TO_VALID(data); in configure_ddr_sched_ctrl_regs()
287 rd_to_miss = t_rtp + t_rp + t_rcd - burst_len_sched_clk; in configure_ddr_sched_ctrl_regs()
289 / 2) - rd_to_wr + t_rp + t_rcd; in configure_ddr_sched_ctrl_regs()
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| /external/u-boot/arch/arm/mach-keystone/ |
| D | ddr3_spd.c | 105 u32 t_rp; member
221 spd->t_rp = (((buf->trp_min * mtb) - 1) / spd->t_ck) + 1; in ddrtimingcalculation()
328 (spd->t_rp & 0xf) << 8 | (spd->t_wtr & 0xf) << 4 | in init_ddr3param()
383 spd_cb->emif_cfg.sdtim2 = 0x07 << 10 | ((spd->t_rp - 1) & 0x1f) << 5 | in init_ddr3param()
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| /external/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/ |
| D | dram.c | 41 writel((ck / dram->trp) & 0x0000000F, &emc->t_rp); in ddr_init()
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| /external/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| D | emc.h | 21 u32 t_rp; /* Precharge command period */ member
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| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr3_training.c | 1623 u32 t_rcd = 0, t_rp = 0, t_wr = 0, t_wtr = 0, t_rrd = 0, t_rtp = 0, in ddr3_tip_set_timing() local
1675 t_rp = time_to_nclk(mv_ddr_speed_bin_timing_get(speed_bin_index, in ddr3_tip_set_timing()
1692 (((t_rp - 1) & SDRAM_TIMING_LOW_TRP_MASK) << SDRAM_TIMING_LOW_TRP_OFFS) | in ddr3_tip_set_timing()
1693 (((t_rp - 1) >> SDRAM_TIMING_LOW_TRP_MASK & SDRAM_TIMING_HIGH_TRP_MASK) in ddr3_tip_set_timing()
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