Searched refs:t_rtp (Results 1 – 4 of 4) sorted by relevance
| /external/arm-trusted-firmware/plat/intel/soc/agilex/soc/ |
| D | agilex_memory_controller.c | 178 t_rtp, t_rp, t_rcd, rd_latency, tw_rin_clk_cycles, in configure_ddr_sched_ctrl_regs() local
221 t_rtp = RD_TO_PCH(data); in configure_ddr_sched_ctrl_regs()
258 rd_to_miss = t_rtp + t_rp + t_rcd - burst_len_sched_clk; in configure_ddr_sched_ctrl_regs()
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| /external/arm-trusted-firmware/plat/intel/soc/stratix10/soc/ |
| D | s10_memory_controller.c | 207 t_rtp, t_rp, t_rcd, rd_latency, tw_rin_clk_cycles, in configure_ddr_sched_ctrl_regs() local
250 t_rtp = RD_TO_PCH(data); in configure_ddr_sched_ctrl_regs()
287 rd_to_miss = t_rtp + t_rp + t_rcd - burst_len_sched_clk; in configure_ddr_sched_ctrl_regs()
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| /external/u-boot/arch/arm/mach-keystone/ |
| D | ddr3_spd.c | 103 u32 t_rtp; member
232 spd->t_rtp = (buf->trtp_min * mtb) / spd->t_ck; in ddrtimingcalculation()
329 (spd->t_rtp & 0xf); in init_ddr3param()
389 ((spd->t_rtp - 1) & 0xf) << 4 | ((spd->t_cke) & 0xf); in init_ddr3param()
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| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr3_training.c | 1623 u32 t_rcd = 0, t_rp = 0, t_wr = 0, t_wtr = 0, t_rrd = 0, t_rtp = 0, in ddr3_tip_set_timing() local
1664 t_rtp = GET_MAX_VALUE(t_ckclk * 4, mv_ddr_speed_bin_timing_get(speed_bin_index, in ddr3_tip_set_timing()
1683 t_rtp = time_to_nclk(t_rtp, t_ckclk); in ddr3_tip_set_timing()
1699 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
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