/external/u-boot/drivers/ddr/imx/imx8m/ |
D | ddr_init.c | 25 unsigned int tmp, initial_drate, target_freq; in ddr_init() local 79 target_freq = reg32_read(DDRC_MSTR2(0)) & 0x3; in ddr_init() 80 target_freq = (tmp & (0x1 << 29)) ? target_freq : 0x0; in ddr_init() 86 clrsetbits_le32(DDRC_DFIMISC(0), (0x1f << 8), target_freq << 8); in ddr_init()
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/external/u-boot/drivers/ddr/marvell/axp/ |
D | ddr3_init.c | 353 u32 target_freq; in ddr3_init_main() local 409 get_target_freq(cpu_freq, &target_freq, &hclk_time_ps); in ddr3_init_main() 411 target_freq = cpu_ddr_ratios[fab_opt][cpu_freq]; in ddr3_init_main() 414 if ((target_freq == 0) || (hclk_time_ps == 0)) { in ddr3_init_main() 416 if (target_freq == 0) { in ddr3_init_main() 417 DEBUG_INIT_C("target_freq", target_freq, 2); in ddr3_init_main() 605 status = ddr3_hw_training(target_freq, ddr_width, in ddr3_init_main() 628 status = ddr3_hw_training(target_freq, ddr_width, in ddr3_init_main()
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D | ddr3_dfs.c | 53 u32 ddr3_get_freq_parameter(u32 target_freq, int ratio_2to1); 86 u32 ddr3_get_freq_parameter(u32 target_freq, int ratio_2to1) in ddr3_get_freq_parameter() argument 93 freq_par = div_ratio[ui_vco_freq][target_freq]; in ddr3_get_freq_parameter() 97 freq_par = div_ratio2to1[ui_vco_freq][target_freq]; in ddr3_get_freq_parameter() 99 freq_par = div_ratio1to1[ui_vco_freq][target_freq]; in ddr3_get_freq_parameter()
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D | ddr3_init.h | 95 int ddr3_hw_training(u32 target_freq, u32 ddr_width,
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D | ddr3_hw_training.c | 77 int ddr3_hw_training(u32 target_freq, u32 ddr_width, int xor_bypass, in ddr3_hw_training() argument 95 dram_info.target_frequency = target_freq; in ddr3_hw_training()
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/external/arm-trusted-firmware/plat/ti/k3/common/drivers/ti_sci/ |
D | ti_sci.h | 133 uint64_t min_freq, uint64_t target_freq, 136 uint64_t min_freq, uint64_t target_freq,
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D | ti_sci.c | 1018 uint64_t min_freq, uint64_t target_freq, in ti_sci_clock_get_match_freq() argument 1039 req.target_freq_hz = target_freq; in ti_sci_clock_get_match_freq() 1072 uint64_t target_freq, uint64_t max_freq) in ti_sci_clock_set_freq() argument 1091 req.target_freq_hz = target_freq; in ti_sci_clock_set_freq()
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/external/autotest/server/cros/crosperf/ |
D | device_setup_utils.py | 302 target_freq = round(max_freq * freq_percent / 100) 309 if next_largest <= target_freq:
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/external/toolchain-utils/cros_utils/ |
D | device_setup_utils.py | 268 target_freq = round(max_freq * freq_percent / 100) 275 if next_largest <= target_freq:
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/external/u-boot/include/linux/soc/ti/ |
D | ti_sci_protocol.h | 214 u8 cid, u64 min_freq, u64 target_freq, 217 u64 min_freq, u64 target_freq, u64 max_freq);
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/external/u-boot/drivers/ddr/marvell/a38x/ |
D | ddr3_init.h | 134 extern u32 target_freq;
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/external/u-boot/drivers/firmware/ |
D | ti_sci.c | 1396 u64 target_freq, u64 max_freq, in ti_sci_cmd_clk_get_match_freq() argument 1423 req.target_freq_hz = target_freq; in ti_sci_cmd_clk_get_match_freq() 1462 u64 target_freq, u64 max_freq) in ti_sci_cmd_clk_set_freq() argument 1488 req.target_freq_hz = target_freq; in ti_sci_cmd_clk_set_freq()
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/external/cpuinfo/test/dmesg/ |
D | moto-g-gen5.log | 1416 …07.646:49): avc: denied { read } for uid=2000 pid=2606 comm="sh" name="target_freq" dev="sysfs" in…
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