| /external/libdrm/radeon/ |
| D | radeon_surface.c | 655 unsigned bpe, unsigned tile_split, in eg_surface_init_2d() argument
669 if (tileb > tile_split && tile_split) { in eg_surface_init_2d()
670 slice_pt = tileb / tile_split; in eg_surface_init_2d()
734 switch (surf->tile_split) { in eg_surface_sanity()
779 tileb = MIN2(surf->tile_split, 64 * surf->bpe * surf->nsamples); in eg_surface_sanity()
821 surf->tile_split, 0, 0); in eg_surface_init_2d_miptrees()
918 surf->tile_split = 1024; in eg_surface_best()
922 tileb = MIN2(surf->tile_split, 64 * surf->bpe * surf->nsamples); in eg_surface_best()
947 surf->tile_split = 128; in eg_surface_best()
950 surf->tile_split = 128; in eg_surface_best()
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| D | radeon_surface.h | 133 uint32_t tile_split; member
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_bo.c | 752 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
754 switch (tile_split) { in eg_tile_split()
755 case 0: tile_split = 64; break; in eg_tile_split()
756 case 1: tile_split = 128; break; in eg_tile_split()
757 case 2: tile_split = 256; break; in eg_tile_split()
758 case 3: tile_split = 512; break; in eg_tile_split()
760 case 4: tile_split = 1024; break; in eg_tile_split()
761 case 5: tile_split = 2048; break; in eg_tile_split()
762 case 6: tile_split = 4096; break; in eg_tile_split()
764 return tile_split; in eg_tile_split()
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| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_bo.c | 846 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
848 switch (tile_split) { in eg_tile_split()
849 case 0: tile_split = 64; break; in eg_tile_split()
850 case 1: tile_split = 128; break; in eg_tile_split()
851 case 2: tile_split = 256; break; in eg_tile_split()
852 case 3: tile_split = 512; break; in eg_tile_split()
854 case 4: tile_split = 1024; break; in eg_tile_split()
855 case 5: tile_split = 2048; break; in eg_tile_split()
856 case 6: tile_split = 4096; break; in eg_tile_split()
858 return tile_split; in eg_tile_split()
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| D | radeon_drm_surface.c | 36 tileb = MIN2(surf->u.legacy.tile_split, tileb); in cik_get_macro_tile_index()
154 surf_drm->tile_split = surf_ws->u.legacy.tile_split; in surf_winsys_to_drm()
196 surf_ws->u.legacy.tile_split = surf_drm->tile_split; in surf_drm_to_winsys()
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| /external/mesa3d/src/amd/addrlib/src/chip/r800/ |
| D | si_gb_reg.h | 108 unsigned int tile_split : 3; member
139 unsigned int tile_split : 3; member
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| /external/mesa3d/src/amd/common/ |
| D | ac_surface.c | 684 tileb = MIN2(surf->u.legacy.tile_split, tileb); in cik_get_macro_tile_index()
735 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes; in gfx6_surface_settings()
983 surf->u.legacy.bankh && surf->u.legacy.mtilea && surf->u.legacy.tile_split) { in gfx6_compute_surface()
990 AddrTileInfoIn.tileSplitBytes = surf->u.legacy.tile_split; in gfx6_compute_surface()
2165 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
2167 switch (tile_split) { in eg_tile_split()
2169 tile_split = 64; in eg_tile_split()
2172 tile_split = 128; in eg_tile_split()
2175 tile_split = 256; in eg_tile_split()
2178 tile_split = 512; in eg_tile_split()
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| D | ac_surface.h | 107 unsigned tile_split : 13; /* max 4K */ member
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | evergreen_state.c | 64 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
66 switch (tile_split) { in eg_tile_split()
67 case 64: tile_split = 0; break; in eg_tile_split()
68 case 128: tile_split = 1; break; in eg_tile_split()
69 case 256: tile_split = 2; break; in eg_tile_split()
70 case 512: tile_split = 3; break; in eg_tile_split()
72 case 1024: tile_split = 4; break; in eg_tile_split()
73 case 2048: tile_split = 5; break; in eg_tile_split()
74 case 4096: tile_split = 6; break; in eg_tile_split()
76 return tile_split; in eg_tile_split()
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| D | radeon_video.c | 180 surfaces[i]->u.legacy.tile_split = surfaces[best_tiling]->u.legacy.tile_split; in rvid_join_surfaces()
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| D | r600_texture.c | 286 metadata->u.legacy.tile_split = surface->u.legacy.tile_split; in r600_texture_init_metadata()
302 surf->u.legacy.tile_split = metadata->u.legacy.tile_split; in r600_surface_import_metadata()
615 fmask.u.legacy.tile_split = rtex->surface.u.legacy.tile_split; in r600_texture_get_fmask_info()
845 rtex->surface.u.legacy.tile_split, rtex->surface.u.legacy.pipe_config, in r600_print_texture_info()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | cik_sdma.c | 47 ((util_logbase2(tex->surface.u.legacy.tile_split >> 6)) << 11) | in encode_tile_info()
406 tiled->surface.u.legacy.tile_split <= 4096 && pitch_tile_max < (1 << 11) && in cik_sdma_copy_texture()
444 ssrc->surface.u.legacy.tile_split <= 4096 && sdst->surface.u.legacy.tile_split <= 4096 && in cik_sdma_copy_texture()
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| D | si_texture.c | 895 tex->surface.u.legacy.mtilea, tex->surface.u.legacy.tile_split, in si_print_texture_info()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_radeon_winsys.h | 139 unsigned tile_split; member
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| D | radv_image.c | 336 surface->u.legacy.tile_split = md->u.legacy.tile_split; in radv_patch_surface_from_metadata()
1240 metadata->u.legacy.tile_split = surface->u.legacy.tile_split; in radv_init_metadata()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_winsys.h | 223 unsigned tile_split; member
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| /external/mesa3d/src/amd/addrlib/src/r800/ |
| D | ciaddrlib.cpp | 1601 pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; in ReadGbTileMode()
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| D | siaddrlib.cpp | 3086 pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; in ReadGbTileMode()
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