| /external/igt-gpu-tools/tests/ |
| D | kms_flip_tiling.c | 65 test_flip_tiling(data_t *data, enum pipe pipe, igt_output_t *output, uint64_t tiling[2]) in test_flip_tiling()
80 if (tiling[0] == LOCAL_I915_FORMAT_MOD_Y_TILED || in test_flip_tiling()
81 tiling[0] == LOCAL_I915_FORMAT_MOD_Yf_TILED || in test_flip_tiling()
82 tiling[1] == LOCAL_I915_FORMAT_MOD_Y_TILED || in test_flip_tiling()
83 tiling[1] == LOCAL_I915_FORMAT_MOD_Yf_TILED) in test_flip_tiling()
90 if (tiling[0] != tiling[1] && in test_flip_tiling()
91 (tiling[0] != LOCAL_DRM_FORMAT_MOD_NONE || in test_flip_tiling()
92 tiling[1] != LOCAL_DRM_FORMAT_MOD_NONE)) { in test_flip_tiling()
104 DRM_FORMAT_XRGB8888, tiling[0], in test_flip_tiling()
110 DRM_FORMAT_XRGB8888, tiling[1], in test_flip_tiling()
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| D | kms_plane_scaling.c | 95 uint64_t tiling = is_i915_device(data->drm_fd) ? in prepare_crtc() local
103 tiling)); in prepare_crtc()
108 tiling, in prepare_crtc()
134 uint64_t tiling, enum pipe pipe, in check_scaling_pipe_plane_rot() argument
152 pixel_format, tiling, 0.0, 1.0, 0.0, &d->fb[0]); in check_scaling_pipe_plane_rot()
174 static bool can_rotate(data_t *d, unsigned format, uint64_t tiling, in can_rotate() argument
229 uint64_t tiling = is_i915_device(d->drm_fd) ? in test_scaler_with_rotation_pipe() local
243 igt_plane_has_format_mod(plane, format, tiling) && in test_scaler_with_rotation_pipe()
244 can_rotate(d, format, tiling, rot) && in test_scaler_with_rotation_pipe()
247 tiling, pipe, in test_scaler_with_rotation_pipe()
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| D | kms_plane_multiple.c | 100 color_t *color, uint64_t tiling) in get_reference_crc() argument
131 int *rect_w, int *rect_h, uint64_t tiling, in create_fb_for_mode_position() argument
142 tiling)); in create_fb_for_mode_position()
147 tiling, in create_fb_for_mode_position()
169 uint64_t tiling, int max_planes, igt_output_t *output) in prepare_planes() argument
246 plane_tiling = data->plane[i]->type == DRM_PLANE_TYPE_CURSOR ? LOCAL_DRM_FORMAT_MOD_NONE : tiling; in prepare_planes()
265 size, size, tiling, max_planes); in prepare_planes()
287 uint64_t tiling) in test_plane_position_with_output() argument
309 get_reference_crc(data, output, pipe, &blue, tiling); in test_plane_position_with_output()
314 prepare_planes(data, pipe, &blue, tiling, c, output); in test_plane_position_with_output()
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| D | kms_rotation_crc.c | 203 uint64_t tiling = data->override_tiling ?: LOCAL_DRM_FORMAT_MOD_NONE; in prepare_fbs() local
249 tiling = data->override_tiling ?: LOCAL_I915_FORMAT_MOD_Y_TILED; in prepare_fbs()
257 igt_create_fb(data->gfx_fd, ref_w, ref_h, pixel_format, tiling, in prepare_fbs()
272 igt_create_fb(data->gfx_fd, w, h, pixel_format, tiling, in prepare_fbs()
294 igt_create_fb(data->gfx_fd, ref_w, ref_h, pixel_format, tiling, &data->fb_unrotated); in prepare_fbs()
305 igt_create_fb(data->gfx_fd, w, h, pixel_format, tiling, &data->fb); in prepare_fbs()
425 uint64_t width, height, tiling, planetype, format; member
457 planeinfo[c].tiling)) in get_multiplane_crc()
461 planeinfo[c].tiling, &planes[c].fb); in get_multiplane_crc()
535 uint64_t tiling; in test_multi_plane_rotation() member
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| /external/mesa3d/src/intel/isl/ |
| D | isl_drm.c | 34 isl_tiling_to_i915_tiling(enum isl_tiling tiling) in isl_tiling_to_i915_tiling() argument
36 switch (tiling) { in isl_tiling_to_i915_tiling()
59 isl_tiling_from_i915_tiling(uint32_t tiling) in isl_tiling_from_i915_tiling() argument
61 switch (tiling) { in isl_tiling_from_i915_tiling()
79 .tiling = ISL_TILING_LINEAR,
84 .tiling = ISL_TILING_X,
89 .tiling = ISL_TILING_Y0,
94 .tiling = ISL_TILING_Y0,
101 .tiling = ISL_TILING_Y0,
108 .tiling = ISL_TILING_Y0,
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| D | isl_gen9.c | 35 enum isl_tiling tiling, in gen9_calc_std_image_alignment_sa() argument
41 assert(isl_tiling_is_std_y(tiling)); in gen9_calc_std_image_alignment_sa()
44 const uint32_t is_Ys = tiling == ISL_TILING_Ys; in gen9_calc_std_image_alignment_sa()
102 enum isl_tiling tiling, in isl_gen9_choose_image_alignment_el() argument
168 if (isl_tiling_is_std_y(tiling)) { in isl_gen9_choose_image_alignment_el()
170 gen9_calc_std_image_alignment_sa(dev, info, tiling, msaa_layout, in isl_gen9_choose_image_alignment_el()
199 isl_gen8_choose_image_alignment_el(dev, info, tiling, dim_layout, in isl_gen9_choose_image_alignment_el()
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| D | isl.c | 45 enum isl_tiling tiling, in isl_memcpy_linear_to_tiled() argument
52 tiling, copy_type); in isl_memcpy_linear_to_tiled()
59 tiling, copy_type); in isl_memcpy_linear_to_tiled()
68 enum isl_tiling tiling, in isl_memcpy_tiled_to_linear() argument
75 tiling, copy_type); in isl_memcpy_tiled_to_linear()
82 tiling, copy_type); in isl_memcpy_tiled_to_linear()
308 isl_tiling_get_info(enum isl_tiling tiling, in isl_tiling_get_info() argument
315 if (tiling != ISL_TILING_LINEAR && !isl_is_pow2(format_bpb)) { in isl_tiling_get_info()
321 assert(tiling == ISL_TILING_X || tiling == ISL_TILING_Y0); in isl_tiling_get_info()
323 isl_tiling_get_info(tiling, format_bpb / 3, tile_info); in isl_tiling_get_info()
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| D | isl_tiled_memcpy_sse41.c | 42 enum isl_tiling tiling, in _isl_memcpy_linear_to_tiled_sse41() argument
46 has_swizzling, tiling, copy_type); in _isl_memcpy_linear_to_tiled_sse41()
55 enum isl_tiling tiling, in _isl_memcpy_tiled_to_linear_sse41() argument
59 has_swizzling, tiling, copy_type); in _isl_memcpy_tiled_to_linear_sse41()
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| D | isl_tiled_memcpy_normal.c | 41 enum isl_tiling tiling, in _isl_memcpy_linear_to_tiled() argument
45 has_swizzling, tiling, copy_type); in _isl_memcpy_linear_to_tiled()
54 enum isl_tiling tiling, in _isl_memcpy_tiled_to_linear() argument
58 has_swizzling, tiling, copy_type); in _isl_memcpy_tiled_to_linear()
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| D | isl_gen8.c | 30 enum isl_tiling tiling, in isl_gen8_choose_msaa_layout() argument
93 enum isl_tiling tiling, in isl_gen8_choose_image_alignment_el() argument
101 assert(!isl_tiling_is_std_y(tiling)); in isl_gen8_choose_image_alignment_el()
176 if (ISL_DEV_GEN(dev) >= 11 && isl_tiling_is_any_y(tiling) && in isl_gen8_choose_image_alignment_el()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_regions.c | 111 uint32_t tiling, drm_intel_bo *buffer) in intel_region_alloc_internal() argument
125 region->tiling = tiling; in intel_region_alloc_internal()
133 uint32_t tiling, in intel_region_alloc() argument
147 &tiling, &aligned_pitch, flags); in intel_region_alloc()
152 aligned_pitch, tiling, buffer); in intel_region_alloc()
183 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_handle() local
188 ret = drm_intel_bo_get_tiling(buffer, &tiling, &bit_6_swizzle); in intel_region_alloc_for_handle()
197 width, height, pitch, tiling, buffer); in intel_region_alloc_for_handle()
218 uint32_t bit_6_swizzle, tiling; in intel_region_alloc_for_fd() local
223 ret = drm_intel_bo_get_tiling(buffer, &tiling, &bit_6_swizzle); in intel_region_alloc_for_fd()
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| /external/igt-gpu-tools/tests/i915/ |
| D | gem_fence_thrash.c | 60 int tiling; member
65 bo_create (int fd, int tiling) in bo_create() argument
78 gem_set_tiling(fd, handle, tiling, 1024); in bo_create()
96 a = bo_create (fd, t->tiling); in bo_copy()
97 b = bo_create (fd, t->tiling); in bo_copy()
130 igt_assert(t->tiling >= 0 && t->tiling <= I915_TILING_Y); in _bo_write_verify()
137 s[k] = bo_create(fd, t->tiling); in _bo_write_verify()
145 tile_str[t->tiling], a[0]); in _bo_write_verify()
150 tile_str[t->tiling], a[dwords - 1]); in _bo_write_verify()
160 tile_str[t->tiling], i + j, tmp[j]); in _bo_write_verify()
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| D | gem_set_tiling_vs_blt.c | 74 static void do_test(uint32_t tiling, unsigned stride, in do_test() argument
139 ret = drm_intel_bo_set_tiling(test_bo, &tiling, stride); in do_test()
142 if (tiling == I915_TILING_NONE) { in do_test()
154 if (intel_gen(devid) >= 4 && tiling != I915_TILING_NONE) { in do_test()
226 uint32_t tiling, tiling_after; variable
244 tiling = I915_TILING_NONE;
246 do_test(tiling, TEST_STRIDE, tiling_after, TEST_STRIDE);
247 igt_assert(tiling == I915_TILING_NONE);
252 tiling = I915_TILING_X;
254 do_test(tiling, TEST_STRIDE, tiling_after, TEST_STRIDE);
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| D | gem_render_copy.c | 192 if (buf->tiling == I915_TILING_Yf) in linear_copy()
325 if (buf->tiling == I915_TILING_Yf) in scratch_buf_draw_pattern()
358 if (src->tiling == I915_TILING_Yf) { in scratch_buf_copy()
402 uint32_t tiling = req_tiling; in scratch_buf_init() local
413 igt_assert(tiling == I915_TILING_Y || in scratch_buf_init()
414 tiling == I915_TILING_Yf); in scratch_buf_init()
418 buf->tiling = tiling; in scratch_buf_init()
431 if (tiling == I915_TILING_Y) { in scratch_buf_init()
432 drm_intel_bo_set_tiling(buf->bo, &tiling, buf->stride); in scratch_buf_init()
433 igt_assert_eq(tiling, req_tiling); in scratch_buf_init()
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| D | gen3_render_mixed_blits.c | 301 create_bo(int fd, uint32_t val, int tiling) in create_bo() argument
308 gem_set_tiling(fd, handle, tiling, WIDTH*4); in create_bo()
358 uint32_t *handle, *tiling, *start_val; variable
372 tiling = handle + count;
373 start_val = tiling + count;
376 handle[i] = create_bo(fd, start, tiling[i] = i % 3);
391 copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
404 copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
420 copy(fd, handle[dst], tiling[dst], handle[src], tiling[src]);
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| /external/igt-gpu-tools/lib/ |
| D | igt_draw.c | 267 static void switch_blt_tiling(struct intel_batchbuffer *batch, uint32_t tiling, in switch_blt_tiling() argument
273 if (tiling != I915_TILING_Y) in switch_blt_tiling()
308 static void draw_rect_ptr_tiled(void *ptr, uint32_t stride, uint32_t tiling, in draw_rect_ptr_tiled() argument
316 switch (tiling) { in draw_rect_ptr_tiled()
337 uint32_t tiling, swizzle; in draw_rect_mmap_cpu() local
341 igt_require(gem_get_tiling(fd, buf->handle, &tiling, &swizzle)); in draw_rect_mmap_cpu()
344 if (tiling != I915_TILING_NONE) in draw_rect_mmap_cpu()
349 switch (tiling) { in draw_rect_mmap_cpu()
355 draw_rect_ptr_tiled(ptr, buf->stride, tiling, swizzle, rect, in draw_rect_mmap_cpu()
388 uint32_t tiling, swizzle; in draw_rect_mmap_wc() local
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| D | rendercopy_i830.c | 138 uint32_t tiling; in gen2_emit_target() local
152 tiling = 0; in gen2_emit_target()
153 if (dst->tiling != I915_TILING_NONE) in gen2_emit_target()
154 tiling = BUF_3D_TILED_SURFACE; in gen2_emit_target()
155 if (dst->tiling == I915_TILING_Y) in gen2_emit_target()
156 tiling |= BUF_3D_TILE_WALK_Y; in gen2_emit_target()
159 OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(dst->stride)); in gen2_emit_target()
179 uint32_t tiling; in gen2_emit_texture() local
193 tiling = 0; in gen2_emit_texture()
194 if (src->tiling != I915_TILING_NONE) in gen2_emit_texture()
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| /external/tensorflow/tensorflow/compiler/xla/g3doc/ |
| D | tiled_layout.md | 10 Figure 1 shows how an array F32[3,5] is laid out in memory with 2x2 tiling. A
13 after the colon indicates tiling of the physical dimensions by a 2x2 tile.
16 elements are then laid out without tiling, as in the example above, where the
24 ## Linear index formulas for tiling given a shape and a tile
26 Without tiling, an element e=(e<sub>n</sub>, e<sub>n-1</sub>, ... ,
38 of dimensions as the array. In XLA's implementation of tiling, this is
40 dimensions unchanged and applying the tiling only to the most minor dimensions,
41 so that the tiling that is specified mentions a suffix of the physical
44 When tiling of size (t<sub>n</sub>, t<sub>n-1</sub>, ... , t<sub>1</sub>) is
70 tiles are laid out recursively without tiling.
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| /external/mesa3d/src/broadcom/vulkan/ |
| D | v3dv_image.c | 138 slice->tiling = VC5_TILING_RASTER; in v3d_setup_slices()
144 slice->tiling = VC5_TILING_LINEARTILE; in v3d_setup_slices()
148 slice->tiling = VC5_TILING_UBLINEAR_1_COLUMN; in v3d_setup_slices()
152 slice->tiling = VC5_TILING_UBLINEAR_2_COLUMN; in v3d_setup_slices()
171 slice->tiling = VC5_TILING_UIF_XOR; in v3d_setup_slices()
173 slice->tiling = VC5_TILING_UIF_NO_XOR; in v3d_setup_slices()
181 if (slice->tiling == VC5_TILING_UIF_NO_XOR || in v3d_setup_slices()
182 slice->tiling == VC5_TILING_UIF_XOR) { in v3d_setup_slices()
215 image->tiling == VK_IMAGE_TILING_LINEAR ? image->cpp : 4096; in v3d_setup_slices()
276 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) { in v3dv_CreateImage()
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| D | v3dv_formats.c | 386 VkImageTiling tiling) in image_format_features() argument
417 tiling == VK_IMAGE_TILING_OPTIMAL) { in image_format_features()
564 VkImageTiling tiling, in get_image_format_properties() argument
570 image_format_features(info->format, v3dv_format, tiling); in get_image_format_properties()
680 if (tiling != VK_IMAGE_TILING_LINEAR && in get_image_format_properties()
688 if (tiling == VK_IMAGE_TILING_LINEAR) in get_image_format_properties()
723 VkImageTiling tiling, in v3dv_GetPhysicalDeviceImageFormatProperties() argument
735 .tiling = tiling, in v3dv_GetPhysicalDeviceImageFormatProperties()
740 return get_image_format_properties(physical_device, &info, tiling, in v3dv_GetPhysicalDeviceImageFormatProperties()
753 VkImageTiling tiling = base_info->tiling; in v3dv_GetPhysicalDeviceImageFormatProperties2() local
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| /external/deqp/external/vulkancts/modules/vulkan/ycbcr/ |
| D | vktYCbCrFormatTests.cpp | 74 VkImageTiling tiling, in createTestImage() argument
89 tiling, in createTestImage()
227 VkImageTiling tiling; member
242 , tiling (tiling_) in TestParameters()
252 , tiling (VK_IMAGE_TILING_OPTIMAL) in TestParameters()
287 checkImageSupport(context, params.format, params.flags, params.tiling); in checkSupport()
295 …params.format, VK_IMAGE_TYPE_2D, params.tiling, VK_IMAGE_USAGE_TRANSFER_DST_BIT | VK_IMAGE_USAGE_S… in checkSupport()
324 const VkImageTiling tiling = params.tiling; in testFormat() local
329 …> image (createTestImage(vkd, device, format, size, createFlags, tiling, mappedMemory ? VK… in testFormat()
397 params.tiling, in testFormat()
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| /external/minigbm/ |
| D | i915.c | 71 metadata.tiling = I915_TILING_NONE; in i915_add_combinations()
107 metadata.tiling = I915_TILING_X; in i915_add_combinations()
115 metadata.tiling = I915_TILING_Y; in i915_add_combinations()
139 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride, in i915_align_dimensions() argument
146 switch (tiling) { in i915_align_dimensions()
254 if (bo->meta.tiling != I915_TILING_NONE) in i915_bo_from_format()
257 ret = i915_align_dimensions(bo, bo->meta.tiling, &stride, &plane_height); in i915_bo_from_format()
294 bo->meta.tiling = I915_TILING_NONE; in i915_bo_compute_metadata()
297 bo->meta.tiling = I915_TILING_X; in i915_bo_compute_metadata()
301 bo->meta.tiling = I915_TILING_Y; in i915_bo_compute_metadata()
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| /external/angle/third_party/VulkanMemoryAllocator/tools/VmaDumpVis/ |
| D | README.md | 35 *  Image with OPTIMAL tiling and usage contain…
36 *  Image with OPTIMAL tiling and usage contain…
37 *  Image with OPTIMAL tiling and usage contain…
38 *  Other image with OPTIMAL tiling.
39 *  Image with LINEAR tiling.
40 *  Image with tiling unknown…
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| /external/deqp/external/vulkancts/modules/vulkan/api/ |
| D | vktApiBufferAndImageAllocationUtil.cpp | 111 VkImageTiling tiling) const in createTestImage()
128 tiling, // VkImageTiling tiling; in createTestImage()
129 …(vk::VkImageUsageFlags)((tiling == VK_IMAGE_TILING_LINEAR) ? VK_IMAGE_USAGE_TRANSFER_SRC_BIT | VK_… in createTestImage()
149 VkImageTiling tiling) const in createTestImage()
172 tiling, // VkImageTiling tiling; in createTestImage()
173 …(vk::VkImageUsageFlags)((tiling == VK_IMAGE_TILING_LINEAR) ? VK_IMAGE_USAGE_TRANSFER_SRC_BIT | VK_… in createTestImage()
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| /external/igt-gpu-tools/benchmarks/ |
| D | gem_mmap.c | 61 int tiling = I915_TILING_NONE; in main() local
98 tiling = I915_TILING_X; in main()
100 tiling = I915_TILING_Y; in main()
102 tiling = I915_TILING_NONE; in main()
136 gem_set_tiling(fd, handle, tiling, 512); in main()
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