Home
last modified time | relevance | path

Searched refs:ushl (Results 1 – 25 of 51) sorted by relevance

123

/external/capstone/suite/MC/AArch64/
Dneon-shift.s.cs9 0x20,0x44,0x22,0x2e = ushl v0.8b, v1.8b, v2.8b
10 0x20,0x44,0x22,0x6e = ushl v0.16b, v1.16b, v2.16b
11 0x20,0x44,0x62,0x2e = ushl v0.4h, v1.4h, v2.4h
12 0x20,0x44,0x62,0x6e = ushl v0.8h, v1.8h, v2.8h
13 0x20,0x44,0xa2,0x2e = ushl v0.2s, v1.2s, v2.2s
14 0x20,0x44,0xa2,0x6e = ushl v0.4s, v1.4s, v2.4s
15 0x20,0x44,0xe2,0x6e = ushl v0.2d, v1.2d, v2.2d
Dneon-scalar-shift.s.cs3 0xf1,0x47,0xe8,0x7e = ushl d17, d31, d8
/external/llvm/test/MC/AArch64/
Dneon-shift.s28 ushl v0.8b, v1.8b, v2.8b
29 ushl v0.16b, v1.16b, v2.16b
30 ushl v0.4h, v1.4h, v2.4h
31 ushl v0.8h, v1.8h, v2.8h
32 ushl v0.2s, v1.2s, v2.2s
33 ushl v0.4s, v1.4s, v2.4s
34 ushl v0.2d, v1.2d, v2.2d
Dneon-scalar-shift.s13 ushl d17, d31, d8
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-shift.s28 ushl v0.8b, v1.8b, v2.8b
29 ushl v0.16b, v1.16b, v2.16b
30 ushl v0.4h, v1.4h, v2.4h
31 ushl v0.8h, v1.8h, v2.8h
32 ushl v0.2s, v1.2s, v2.2s
33 ushl v0.4s, v1.4s, v2.4s
34 ushl v0.2d, v1.2d, v2.2d
Dneon-scalar-shift.s13 ushl d17, d31, d8
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dfunnel-shift-rot.ll91 ; CHECK-NEXT: ushl v3.4s, v0.4s, v4.4s
92 ; CHECK-NEXT: ushl v0.4s, v0.4s, v1.4s
183 ; CHECK-NEXT: ushl v2.4s, v0.4s, v3.4s
184 ; CHECK-NEXT: ushl v0.4s, v0.4s, v1.4s
Darm64-vshr.ll37 ; CHECK-NEXT: ushl.8h [[REG6:v[0-9]+]], [[REG6]], [[REG5]]
/external/libavc/common/armv8/
Dih264_resi_trans_quant_av8.s543 ushl v14.4s, v14.4s, v22.4s
544 ushl v15.4s, v15.4s, v22.4s
545 ushl v16.4s, v16.4s, v22.4s
546 ushl v17.4s, v17.4s, v22.4s
655 ushl v2.4s, v25.4s, v24.4s //>>qbit
656 ushl v3.4s, v26.4s, v24.4s //>>qbit
/external/llvm/test/CodeGen/AArch64/
Darm64-vshr.ll37 ; CHECK-NEXT: ushl.8h [[REG6:v[0-9]+]], [[REG6]], [[REG5]]
/external/libjpeg-turbo/simd/arm64/
Djsimd_neon.S2809 ushl v4.8h, v4.8h, v24.8h /* shift */
2810 ushl v5.8h, v5.8h, v25.8h
2811 ushl v6.8h, v6.8h, v26.8h
2812 ushl v7.8h, v7.8h, v27.8h
3345 ushl v24.8h, v24.8h, v0.8h
3346 ushl v25.8h, v25.8h, v1.8h
3347 ushl v26.8h, v26.8h, v2.8h
3348 ushl v27.8h, v27.8h, v3.8h
3349 ushl v28.8h, v28.8h, v4.8h
3350 ushl v29.8h, v29.8h, v5.8h
[all …]
/external/v8/src/execution/arm64/
Dsimulator-arm64.cc4127 ushl(vf, rd, rn, rm); in VisitNEON3Same()
4160 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4166 ushl(vf, rd, rn, rm).Round(vf); in VisitNEON3Same()
4172 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEON3Same()
5326 ushl(vf, rd, rn, rm); in VisitNEONScalar3Same()
5350 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5356 ushl(vf, rd, rn, rm).Round(vf); in VisitNEONScalar3Same()
5362 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEONScalar3Same()
Dsimulator-logic-arm64.cc1344 return ushl(vform, dst, src, shiftreg); in shl()
1383 return ushl(vform, dst, extendedreg, shiftreg); in ushll()
1392 return ushl(vform, dst, extendedreg, shiftreg); in ushll2()
1422 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in uqshl()
1461 return ushl(vform, dst, src, shiftreg); in ushr()
1603 LogicVRegister Simulator::ushl(VectorFormat vform, LogicVRegister dst, in ushl() function in v8::internal::Simulator
/external/vixl/src/aarch64/
Dsimulator-aarch64.cc4669 ushl(vf, rd, rn, rm); in VisitNEON3Same()
4702 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4708 ushl(vf, rd, rn, rm).Round(vf); in VisitNEON3Same()
4714 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEON3Same()
6157 ushl(vf, rd, rn, rm); in VisitNEONScalar3Same()
6181 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
6187 ushl(vf, rd, rn, rm).Round(vf); in VisitNEONScalar3Same()
6193 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEONScalar3Same()
Dlogic-aarch64.cc1457 return ushl(vform, dst, src, shiftreg); in shl()
1509 return ushl(vform, dst, extendedreg, shiftreg); in ushll()
1521 return ushl(vform, dst, extendedreg, shiftreg); in ushll2()
1560 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in uqshl()
1608 return ushl(vform, dst, src, shiftreg); in ushr()
1782 LogicVRegister Simulator::ushl(VectorFormat vform, in ushl() function in vixl::aarch64::Simulator
/external/vixl/test/test-trace-reference/
Dlog-disasm2074 0x~~~~~~~~~~~~~~~~ 7ef0441f ushl d31, d0, d16
2075 0x~~~~~~~~~~~~~~~~ 6e2244c0 ushl v0.16b, v6.16b, v2.16b
2076 0x~~~~~~~~~~~~~~~~ 6ef24432 ushl v18.2d, v1.2d, v18.2d
2077 0x~~~~~~~~~~~~~~~~ 2ebd44fb ushl v27.2s, v7.2s, v29.2s
2078 0x~~~~~~~~~~~~~~~~ 2e6d45ce ushl v14.4h, v14.4h, v13.4h
2079 0x~~~~~~~~~~~~~~~~ 6ea94496 ushl v22.4s, v4.4s, v9.4s
2080 0x~~~~~~~~~~~~~~~~ 2e3b46d7 ushl v23.8b, v22.8b, v27.8b
2081 0x~~~~~~~~~~~~~~~~ 6e684735 ushl v21.8h, v25.8h, v8.8h
Dlog-disasm-colour2074 0x~~~~~~~~~~~~~~~~ 7ef0441f ushl d31, d0, d16
2075 0x~~~~~~~~~~~~~~~~ 6e2244c0 ushl v0.16b, v6.16b, v2.16b
2076 0x~~~~~~~~~~~~~~~~ 6ef24432 ushl v18.2d, v1.2d, v18.2d
2077 0x~~~~~~~~~~~~~~~~ 2ebd44fb ushl v27.2s, v7.2s, v29.2s
2078 0x~~~~~~~~~~~~~~~~ 2e6d45ce ushl v14.4h, v14.4h, v13.4h
2079 0x~~~~~~~~~~~~~~~~ 6ea94496 ushl v22.4s, v4.4s, v9.4s
2080 0x~~~~~~~~~~~~~~~~ 2e3b46d7 ushl v23.8b, v22.8b, v27.8b
2081 0x~~~~~~~~~~~~~~~~ 6e684735 ushl v21.8h, v25.8h, v8.8h
Dlog-cpufeatures-custom2073 0x~~~~~~~~~~~~~~~~ 7ef0441f ushl d31, d0, d16 ### {NEON} ###
2074 0x~~~~~~~~~~~~~~~~ 6e2244c0 ushl v0.16b, v6.16b, v2.16b ### {NEON} ###
2075 0x~~~~~~~~~~~~~~~~ 6ef24432 ushl v18.2d, v1.2d, v18.2d ### {NEON} ###
2076 0x~~~~~~~~~~~~~~~~ 2ebd44fb ushl v27.2s, v7.2s, v29.2s ### {NEON} ###
2077 0x~~~~~~~~~~~~~~~~ 2e6d45ce ushl v14.4h, v14.4h, v13.4h ### {NEON} ###
2078 0x~~~~~~~~~~~~~~~~ 6ea94496 ushl v22.4s, v4.4s, v9.4s ### {NEON} ###
2079 0x~~~~~~~~~~~~~~~~ 2e3b46d7 ushl v23.8b, v22.8b, v27.8b ### {NEON} ###
2080 0x~~~~~~~~~~~~~~~~ 6e684735 ushl v21.8h, v25.8h, v8.8h ### {NEON} ###
Dlog-cpufeatures2073 0x~~~~~~~~~~~~~~~~ 7ef0441f ushl d31, d0, d16 // Needs: NEON
2074 0x~~~~~~~~~~~~~~~~ 6e2244c0 ushl v0.16b, v6.16b, v2.16b // Needs: NEON
2075 0x~~~~~~~~~~~~~~~~ 6ef24432 ushl v18.2d, v1.2d, v18.2d // Needs: NEON
2076 0x~~~~~~~~~~~~~~~~ 2ebd44fb ushl v27.2s, v7.2s, v29.2s // Needs: NEON
2077 0x~~~~~~~~~~~~~~~~ 2e6d45ce ushl v14.4h, v14.4h, v13.4h // Needs: NEON
2078 0x~~~~~~~~~~~~~~~~ 6ea94496 ushl v22.4s, v4.4s, v9.4s // Needs: NEON
2079 0x~~~~~~~~~~~~~~~~ 2e3b46d7 ushl v23.8b, v22.8b, v27.8b // Needs: NEON
2080 0x~~~~~~~~~~~~~~~~ 6e684735 ushl v21.8h, v25.8h, v8.8h // Needs: NEON
Dlog-cpufeatures-colour2073 0x~~~~~~~~~~~~~~~~ 7ef0441f ushl d31, d0, d16 NEON
2074 0x~~~~~~~~~~~~~~~~ 6e2244c0 ushl v0.16b, v6.16b, v2.16b NEON
2075 0x~~~~~~~~~~~~~~~~ 6ef24432 ushl v18.2d, v1.2d, v18.2d NEON
2076 0x~~~~~~~~~~~~~~~~ 2ebd44fb ushl v27.2s, v7.2s, v29.2s NEON
2077 0x~~~~~~~~~~~~~~~~ 2e6d45ce ushl v14.4h, v14.4h, v13.4h NEON
2078 0x~~~~~~~~~~~~~~~~ 6ea94496 ushl v22.4s, v4.4s, v9.4s NEON
2079 0x~~~~~~~~~~~~~~~~ 2e3b46d7 ushl v23.8b, v22.8b, v27.8b NEON
2080 0x~~~~~~~~~~~~~~~~ 6e684735 ushl v21.8h, v25.8h, v8.8h NEON
Dlog-all5451 0x~~~~~~~~~~~~~~~~ 7ef0441f ushl d31, d0, d16
5453 0x~~~~~~~~~~~~~~~~ 6e2244c0 ushl v0.16b, v6.16b, v2.16b
5455 0x~~~~~~~~~~~~~~~~ 6ef24432 ushl v18.2d, v1.2d, v18.2d
5457 0x~~~~~~~~~~~~~~~~ 2ebd44fb ushl v27.2s, v7.2s, v29.2s
5459 0x~~~~~~~~~~~~~~~~ 2e6d45ce ushl v14.4h, v14.4h, v13.4h
5461 0x~~~~~~~~~~~~~~~~ 6ea94496 ushl v22.4s, v4.4s, v9.4s
5463 0x~~~~~~~~~~~~~~~~ 2e3b46d7 ushl v23.8b, v22.8b, v27.8b
5465 0x~~~~~~~~~~~~~~~~ 6e684735 ushl v21.8h, v25.8h, v8.8h
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2416 __ ushl(d31, d0, d16); in GenerateTestSequenceNEON() local
2417 __ ushl(v0.V16B(), v6.V16B(), v2.V16B()); in GenerateTestSequenceNEON() local
2418 __ ushl(v18.V2D(), v1.V2D(), v18.V2D()); in GenerateTestSequenceNEON() local
2419 __ ushl(v27.V2S(), v7.V2S(), v29.V2S()); in GenerateTestSequenceNEON() local
2420 __ ushl(v14.V4H(), v14.V4H(), v13.V4H()); in GenerateTestSequenceNEON() local
2421 __ ushl(v22.V4S(), v4.V4S(), v9.V4S()); in GenerateTestSequenceNEON() local
2422 __ ushl(v23.V8B(), v22.V8B(), v27.V8B()); in GenerateTestSequenceNEON() local
2423 __ ushl(v21.V8H(), v25.V8H(), v8.V8H()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc2697 TEST_NEON(ushl_0, ushl(v0.V8B(), v1.V8B(), v2.V8B()))
2698 TEST_NEON(ushl_1, ushl(v0.V16B(), v1.V16B(), v2.V16B()))
2699 TEST_NEON(ushl_2, ushl(v0.V4H(), v1.V4H(), v2.V4H()))
2700 TEST_NEON(ushl_3, ushl(v0.V8H(), v1.V8H(), v2.V8H()))
2701 TEST_NEON(ushl_4, ushl(v0.V2S(), v1.V2S(), v2.V2S()))
2702 TEST_NEON(ushl_5, ushl(v0.V4S(), v1.V4S(), v2.V4S()))
2703 TEST_NEON(ushl_6, ushl(v0.V2D(), v1.V2D(), v2.V2D()))
2704 TEST_NEON(ushl_7, ushl(d0, d1, d2))
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt383 # CHECK: ushl v10.16b, v5.16b, v2.16b
385 # CHECK: ushl v10.8h, v5.8h, v2.8h
387 # CHECK: ushl v10.4s, v5.4s, v2.4s
455 # CHECK: ushl d0, d0, d0
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt383 # CHECK: ushl v10.16b, v5.16b, v2.16b
385 # CHECK: ushl v10.8h, v5.8h, v2.8h
387 # CHECK: ushl v10.4s, v5.4s, v2.4s
455 # CHECK: ushl d0, d0, d0

123