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Searched refs:uxtab (Results 1 – 25 of 37) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Duxt_rot.ll14 ; CHECK-V6: uxtab r0, r0, r1
15 ; CHECK-V7: uxtab r0, r0, r1
66 ; CHECK-V6: uxtab r0, r1, r0, ror #8
67 ; CHECK-V7: uxtab r0, r1, r0, ror #8
79 ; CHECK-V6: uxtab r0, r1, r0, ror #16
80 ; CHECK-V7: uxtab r0, r1, r0, ror #16
118 ; CHECK-V6: uxtab r0, r1, r0
119 ; CHECK-V7: uxtab r0, r1, r0
127 ; CHECK-V6: uxtab r0, r1, r0, ror #8
128 ; CHECK-V7: uxtab r0, r1, r0, ror #8
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dthumb2-uxt_rot.ll18 ; CHECK-DSP: uxtab r0, r0, r1
19 ; CHECK-NO-DSP-NOT: uxtab
40 ; CHECK-DSP: uxtab r0, r0, r1, ror #16
41 ; CHECK-NO-DSP-NOT: uxtab
62 ; CHECK-DSP: uxtab r0, r0, r1, ror #8
63 ; CHECK-NO-DSP-NOT: uxtab
Dthumb2-sxt-uxt.ll79 ; CHECK-DSP: uxtab r0, r0, r1
80 ; CHECK-NO-DSP-NOT: uxtab
88 ;CHECK-DSP: uxtab r0, r0, r1
89 ;CHECK-NO-DSP-NOT: uxtab
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxt_rot.ll14 ; A8: uxtab r0, r0, r1
18 ; M3-NOT: uxtab
39 ; A8: uxtab r0, r0, r1, ror #16
/external/llvm/test/CodeGen/ARM/
Duxt_rot.ll27 ; CHECK: uxtab
28 ; CHECK-NOT: uxtab
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s20 uxtab r0, r0, r0 label
30 @ CHECK-7EM: uxtab r0, r0, r0 @ encoding: [0x50,0xfa,0x80,0xf0]
Dbasic-thumb2-instructions.s3631 uxtab r2, r3, r4
3632 uxtab r4, r5, r6, ror #0
3635 uxtab r5, r1, r4, ror #16
3636 uxtab r7, r8, r3, ror #24
3638 @ CHECK: uxtab r2, r3, r4 @ encoding: [0x53,0xfa,0x84,0xf2]
3639 @ CHECK: uxtab r4, r5, r6 @ encoding: [0x55,0xfa,0x86,0xf4]
3642 @ CHECK: uxtab r5, r1, r4, ror #16 @ encoding: [0x51,0xfa,0xa4,0xf5]
3643 @ CHECK: uxtab r7, r8, r3, ror #24 @ encoding: [0x58,0xfa,0xb3,0xf7]
Dbasic-arm-instructions.s3439 uxtab r2, r3, r4
3440 uxtab r4, r5, r6, ror #0
3442 uxtab r5, r1, r4, ror #16
3443 uxtab r7, r8, r3, ror #24
3445 @ CHECK: uxtab r2, r3, r4 @ encoding: [0x74,0x20,0xe3,0xe6]
3446 @ CHECK: uxtab r4, r5, r6 @ encoding: [0x76,0x40,0xe5,0xe6]
3448 @ CHECK: uxtab r5, r1, r4, ror #16 @ encoding: [0x74,0x58,0xe1,0xe6]
3449 @ CHECK: uxtab r7, r8, r3, ror #24 @ encoding: [0x73,0x7c,0xe8,0xe6]
/external/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s20 uxtab r0, r0, r0 label
30 @ CHECK-7EM: uxtab r0, r0, r0 @ encoding: [0x50,0xfa,0x80,0xf0]
Dbasic-arm-instructions.s3437 uxtab r2, r3, r4
3438 uxtab r4, r5, r6, ror #0
3440 uxtab r5, r1, r4, ror #16
3441 uxtab r7, r8, r3, ror #24
3443 @ CHECK: uxtab r2, r3, r4 @ encoding: [0x74,0x20,0xe3,0xe6]
3444 @ CHECK: uxtab r4, r5, r6 @ encoding: [0x76,0x40,0xe5,0xe6]
3446 @ CHECK: uxtab r5, r1, r4, ror #16 @ encoding: [0x74,0x58,0xe1,0xe6]
3447 @ CHECK: uxtab r7, r8, r3, ror #24 @ encoding: [0x73,0x7c,0xe8,0xe6]
Dbasic-thumb2-instructions.s3575 uxtab r2, r3, r4
3576 uxtab r4, r5, r6, ror #0
3579 uxtab r5, r1, r4, ror #16
3580 uxtab r7, r8, r3, ror #24
3582 @ CHECK: uxtab r2, r3, r4 @ encoding: [0x53,0xfa,0x84,0xf2]
3583 @ CHECK: uxtab r4, r5, r6 @ encoding: [0x55,0xfa,0x86,0xf4]
3586 @ CHECK: uxtab r5, r1, r4, ror #16 @ encoding: [0x51,0xfa,0xa4,0xf5]
3587 @ CHECK: uxtab r7, r8, r3, ror #24 @ encoding: [0x58,0xfa,0xb3,0xf7]
/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt51 # CHECK: uxtab
Dthumb2.txt2576 # CHECK: uxtab r2, r3, r4
2577 # CHECK: uxtab r4, r5, r6
2580 # CHECK: uxtab r5, r1, r4, ror #16
2581 # CHECK: uxtab r7, r8, r3, ror #24
Dbasic-arm-instructions.txt2430 # CHECK: uxtab r2, r3, r4
2431 # CHECK: uxtab r4, r5, r6
2433 # CHECK: uxtab r5, r1, r4, ror #16
2434 # CHECK: uxtab r7, r8, r3, ror #24
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt51 # CHECK: uxtab
Dbasic-arm-instructions.txt2430 # CHECK: uxtab r2, r3, r4
2431 # CHECK: uxtab r4, r5, r6
2433 # CHECK: uxtab r5, r1, r4, ror #16
2434 # CHECK: uxtab r7, r8, r3, ror #24
Dthumb2.txt2576 # CHECK: uxtab r2, r3, r4
2577 # CHECK: uxtab r4, r5, r6
2580 # CHECK: uxtab r5, r1, r4, ror #16
2581 # CHECK: uxtab r7, r8, r3, ror #24
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs956 0x74,0x20,0xe3,0xe6 = uxtab r2, r3, r4
957 0x76,0x40,0xe5,0xe6 = uxtab r4, r5, r6
959 0x74,0x58,0xe1,0xe6 = uxtab r5, r1, r4, ror #16
960 0x73,0x7c,0xe8,0xe6 = uxtab r7, r8, r3, ror #24
Dbasic-thumb2-instructions.s.cs1156 0x53,0xfa,0x84,0xf2 = uxtab r2, r3, r4
1157 0x55,0xfa,0x86,0xf4 = uxtab r4, r5, r6
1160 0x51,0xfa,0xa4,0xf5 = uxtab r5, r1, r4, ror #16
1161 0x58,0xfa,0xb3,0xf7 = uxtab r7, r8, r3, ror #24
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-operand-rm-a32.cc75 M(uxtab) \
Dtest-assembler-cond-rd-rn-operand-rm-t32.cc75 M(uxtab) \
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc55 M(uxtab) \
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc55 M(uxtab) \
/external/v8/src/codegen/arm/
Dassembler-arm.h577 void uxtab(Register dst, Register src1, Register src2, int rotate = 0,
/external/vixl/src/aarch32/
Dassembler-aarch32.h3740 void uxtab(Condition cond, Register rd, Register rn, const Operand& operand);
3741 void uxtab(Register rd, Register rn, const Operand& operand) { in uxtab() function
3742 uxtab(al, rd, rn, operand); in uxtab()

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