| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 22 uxtab16 r0, r0, r0 label
32 @ CHECK-7EM: uxtab16 r0, r0, r0 @ encoding: [0x30,0xfa,0x80,0xf0]
|
| D | thumbv8m.s | 29 uxtab16 r0, r1, r2 label
|
| D | basic-thumb2-instructions.s | 3651 uxtab16 r6, r2, r7, ror #0
3652 uxtab16 r3, r5, r8, ror #8
3653 uxtab16 r3, r2, r1, ror #16
3659 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x32,0xfa,0x87,0xf6]
3660 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x35,0xfa,0x98,0xf3]
3661 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x32,0xfa,0xa1,0xf3]
|
| D | basic-arm-instructions.s | 3456 uxtab16 r6, r2, r7, ror #0
3457 uxtab16 r3, r5, r8, ror #8
3458 uxtab16 r3, r2, r1, ror #16
3462 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0xc2,0xe6]
3463 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x78,0x34,0xc5,0xe6]
3464 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0xc2,0xe6]
|
| /external/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 22 uxtab16 r0, r0, r0 label
32 @ CHECK-7EM: uxtab16 r0, r0, r0 @ encoding: [0x30,0xfa,0x80,0xf0]
|
| D | thumbv8m.s | 29 uxtab16 r0, r1, r2 label
|
| D | basic-arm-instructions.s | 3454 uxtab16 r6, r2, r7, ror #0
3455 uxtab16 r3, r5, r8, ror #8
3456 uxtab16 r3, r2, r1, ror #16
3460 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0xc2,0xe6]
3461 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x78,0x34,0xc5,0xe6]
3462 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0xc2,0xe6]
|
| D | basic-thumb2-instructions.s | 3595 uxtab16 r6, r2, r7, ror #0
3596 uxtab16 r3, r5, r8, ror #8
3597 uxtab16 r3, r2, r1, ror #16
3603 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x32,0xfa,0x87,0xf6]
3604 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x35,0xfa,0x98,0xf3]
3605 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x32,0xfa,0xa1,0xf3]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 61 # CHECK: uxtab16
|
| D | thumb-tests.txt | 99 # CHECK: uxtab16 r1, r2, r3, ror #8
|
| D | thumb2.txt | 2596 # CHECK: uxtab16 r6, r2, r7
2597 # CHECK: uxtab16 r3, r5, r8, ror #8
2598 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| D | basic-arm-instructions.txt | 2447 # CHECK: uxtab16 r6, r2, r7
2448 # CHECK: uxtab16 r3, r5, r8, ror #8
2449 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 61 # CHECK: uxtab16
|
| D | thumb-tests.txt | 99 # CHECK: uxtab16 r1, r2, r3, ror #8
|
| D | basic-arm-instructions.txt | 2447 # CHECK: uxtab16 r6, r2, r7
2448 # CHECK: uxtab16 r3, r5, r8, ror #8
2449 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| D | thumb2.txt | 2596 # CHECK: uxtab16 r6, r2, r7
2597 # CHECK: uxtab16 r3, r5, r8, ror #8
2598 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 63 ; CHECK: uxtab16 r0, r1, r0
67 %tmp2 = call i32 @llvm.arm.uxtab16(i32 %b, i32 %tmp1)
429 declare i32 @llvm.arm.uxtab16(i32, i32)
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 962 0x77,0x60,0xc2,0xe6 = uxtab16 r6, r2, r7
963 0x78,0x34,0xc5,0xe6 = uxtab16 r3, r5, r8, ror #8
964 0x71,0x38,0xc2,0xe6 = uxtab16 r3, r2, r1, ror #16
|
| D | basic-thumb2-instructions.s.cs | 1164 0x32,0xfa,0x87,0xf6 = uxtab16 r6, r2, r7
1165 0x35,0xfa,0x98,0xf3 = uxtab16 r3, r5, r8, ror #8
1166 0x32,0xfa,0xa1,0xf3 = uxtab16 r3, r2, r1, ror #16
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-operand-rm-a32.cc | 76 M(uxtab16) \
|
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 76 M(uxtab16) \
|
| D | test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 56 M(uxtab16) \
|
| D | test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc | 56 M(uxtab16) \
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3745 void uxtab16(Condition cond,
3749 void uxtab16(Register rd, Register rn, const Operand& operand) { in uxtab16() function
3750 uxtab16(al, rd, rn, operand); in uxtab16()
|
| D | disasm-aarch32.h | 1429 void uxtab16(Condition cond,
|