Searched refs:v256i8 (Results 1 – 16 of 16) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineValueType.h | 76 v256i8 = 29, //256 x i8 enumerator
279 return (SimpleTy == MVT::v256i8 || SimpleTy == MVT::v128i16 || in is2048BitVector()
333 case v256i8: return i8; in getVectorElementType()
377 case v256i8: return 256; in getVectorNumElements()
508 case v256i8: in getSizeInBits()
611 if (NumElements == 256) return MVT::v256i8; in getVectorVT()
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| D | ValueTypes.td | 53 def v256i8 : ValueType<2048,29>; //256 x i8 vector value
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonCallingConv.td | 103 CCIfType<[v64i32,v128i16,v256i8],
109 CCIfType<[v64i32,v128i16,v256i8],
129 CCIfType<[v64i32,v128i16,v256i8],
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| D | HexagonISelLoweringHVX.cpp | 20 static const MVT LegalW128[] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 };
48 addRegisterClass(MVT::v256i8, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
63 MVT ByteW = Use64b ? MVT::v128i8 : MVT::v256i8; in initializeHVXLowering()
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| D | HexagonRegisterInfo.td | 283 [v128i8, v256i8, v128i8]>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 79 v256i8 = 32, //256 x i8 enumerator
383 return (SimpleTy == MVT::v256i8 || SimpleTy == MVT::v128i16 || in is2048BitVector()
444 case v256i8: in getVectorElementType()
524 case v256i8: return 256; in getVectorNumElements()
746 case v256i8: in getSizeInBits()
852 if (NumElements == 256) return MVT::v256i8; in getVectorVT()
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| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 161 case MVT::v256i8: return "v256i8"; in getEVTString()
239 case MVT::v256i8: return VectorType::get(Type::getInt8Ty(Context), 256); in getTypeForEVT()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ValueTypes.cpp | 158 case MVT::v256i8: return "v256i8"; in getEVTString()
239 case MVT::v256i8: return VectorType::get(Type::getInt8Ty(Context), 256); in getTypeForEVT()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 210 LocVT == MVT::v256i8) { in CC_Hexagon_VarArg()
361 LocVT == MVT::v256i8)) { in CC_HexagonVector()
424 } else if (LocVT == MVT::v256i8 || LocVT == MVT::v128i16 || in RetCC_Hexagon()
548 ty == MVT::v256i8 || in IsHvxVectorType()
1141 RegVT == MVT::v128i16 || RegVT == MVT::v256i8))) { in LowerFormalArguments()
1769 addRegisterClass(MVT::v256i8, &Hexagon::VecDblRegs128BRegClass); in HexagonTargetLowering()
2004 setOperationAction(ISD::CONCAT_VECTORS, MVT::v256i8, Custom); in HexagonTargetLowering()
2896 case MVT::v256i8: in getRegForInlineAsmConstraint()
3030 case MVT::v256i8: in allowsMisalignedMemoryAccesses()
3071 case MVT::v256i8: in findRepresentativeClass()
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| D | HexagonRegisterInfo.td | 238 [v256i8,v128i16,v64i32,v32i64], 2048,
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| D | HexagonInstrInfoV60.td | 798 defm : STrivv_pats <v128i8, v256i8>;
873 defm : LDrivv_pats <v128i8, v256i8>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.td | 55 def v256i8 : ValueType<2048,32>; //256 x i8 vector value
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| /external/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 89 case MVT::v256i8: return "MVT::v256i8"; in getEnumName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 97 case MVT::v256i8: return "MVT::v256i8"; in getEnumName()
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| /external/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 186 def llvm_v256i8_ty : LLVMType<v256i8>; //256 x i8
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 214 def llvm_v256i8_ty : LLVMType<v256i8>; //256 x i8
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