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Searched refs:v32i8 (Results 1 – 25 of 71) sorted by relevance

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/external/clang/test/CodeGen/
Dsystemz-abi-vector.c36 typedef __attribute__((vector_size(32))) char v32i8; typedef
62 v32i8 pass_v32i8(v32i8 arg) { return arg; } in pass_v32i8()
158 struct agg_v32i8 { v32i8 a; };
349 v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); } in va_v32i8()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td56 def : Pat<(v4i64 (bitconvert (v32i8 VR256:$src))), (v4i64 VR256:$src)>;
61 def : Pat<(v8i32 (bitconvert (v32i8 VR256:$src))), (v8i32 VR256:$src)>;
66 def : Pat<(v16i16 (bitconvert (v32i8 VR256:$src))), (v16i16 VR256:$src)>;
69 def : Pat<(v32i8 (bitconvert (v4i64 VR256:$src))), (v32i8 VR256:$src)>;
70 def : Pat<(v32i8 (bitconvert (v8i32 VR256:$src))), (v32i8 VR256:$src)>;
71 def : Pat<(v32i8 (bitconvert (v16i16 VR256:$src))), (v32i8 VR256:$src)>;
72 def : Pat<(v32i8 (bitconvert (v4f64 VR256:$src))), (v32i8 VR256:$src)>;
73 def : Pat<(v32i8 (bitconvert (v8f32 VR256:$src))), (v32i8 VR256:$src)>;
77 def : Pat<(v8f32 (bitconvert (v32i8 VR256:$src))), (v8f32 VR256:$src)>;
82 def : Pat<(v4f64 (bitconvert (v32i8 VR256:$src))), (v4f64 VR256:$src)>;
[all …]
DX86TargetTransformInfo.cpp326 { ISD::SHL, MVT::v32i8, 2 }, // psllw + pand. in getArithmeticInstrCost()
327 { ISD::SRL, MVT::v32i8, 2 }, // psrlw + pand. in getArithmeticInstrCost()
328 { ISD::SRA, MVT::v32i8, 4 }, // psrlw, pand, pxor, psubb. in getArithmeticInstrCost()
354 { ISD::SHL, MVT::v32i8, 4+2 }, // 2*(psllw + pand) + split. in getArithmeticInstrCost()
355 { ISD::SRL, MVT::v32i8, 4+2 }, // 2*(psrlw + pand) + split. in getArithmeticInstrCost()
356 { ISD::SRA, MVT::v32i8, 8+2 }, // 2*(psrlw, pand, pxor, psubb) + split. in getArithmeticInstrCost()
462 { ISD::MUL, MVT::v32i8, 4 }, // extend/pmullw/trunc sequence. in getArithmeticInstrCost()
483 { ISD::MUL, MVT::v32i8, 13 }, // extend/pmullw/trunc sequence. in getArithmeticInstrCost()
548 { ISD::SHL, MVT::v32i8, 2+2 }, in getArithmeticInstrCost()
549 { ISD::SRL, MVT::v32i8, 4+2 }, in getArithmeticInstrCost()
[all …]
DX86CallingConv.td116 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
147 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
191 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
230 CCIfType<[v32i1], CCPromoteToType<v32i8>>,
242 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
531 CCIfType<[v32i1], CCPromoteToType<v32i8>>,
544 CCIfNotVarArg<CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
566 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
610 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], CCPassIndirect<i64>>,
669 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
[all …]
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h73 v32i8 = 26, // 32 x i8 enumerator
258 SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 || in is256BitVector()
330 case v32i8: in getVectorElementType()
385 case v32i8: in getVectorNumElements()
490 case v32i8: in getSizeInBits()
608 if (NumElements == 32) return MVT::v32i8; in getVectorVT()
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp191 { ISD::SHL, MVT::v32i8, 2 }, in getArithmeticInstrCost()
192 { ISD::SRL, MVT::v32i8, 4 }, in getArithmeticInstrCost()
193 { ISD::SRA, MVT::v32i8, 4 }, in getArithmeticInstrCost()
212 { ISD::SHL, MVT::v32i8, 11 }, // vpblendvb sequence. in getArithmeticInstrCost()
215 { ISD::SRL, MVT::v32i8, 11 }, // vpblendvb sequence. in getArithmeticInstrCost()
218 { ISD::SRA, MVT::v32i8, 24 }, // vpblendvb sequence. in getArithmeticInstrCost()
224 { ISD::SDIV, MVT::v32i8, 32*20 }, in getArithmeticInstrCost()
228 { ISD::UDIV, MVT::v32i8, 32*20 }, in getArithmeticInstrCost()
247 { ISD::SHL, MVT::v32i8, 2 }, // psllw. in getArithmeticInstrCost()
256 { ISD::SRL, MVT::v32i8, 2 }, // psrlw. in getArithmeticInstrCost()
[all …]
DX86CallingConv.td50 CCIfType<[v32i1], CCPromoteToType<v32i8>>,
62 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
145 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
327 CCIfType<[v32i1], CCPromoteToType<v32i8>>,
340 CCIfNotVarArg<CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
362 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
403 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], CCPassIndirect<i64>>,
445 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
520 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
536 CCIfNotVarArg<CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h76 v32i8 = 29, // 32 x i8 enumerator
362 SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 || in is256BitVector()
441 case v32i8: in getVectorElementType()
533 case v32i8: in getVectorNumElements()
715 case v32i8: in getSizeInBits()
849 if (NumElements == 32) return MVT::v32i8; in getVectorVT()
/external/llvm/test/CodeGen/X86/
Davx2-cmp.ll25 define <32 x i8> @v32i8-cmp(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
53 define <32 x i8> @v32i8-cmpeq(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
Davx512bw-mov.ll125 …%res = call <32 x i8> @llvm.masked.load.v32i8(<32 x i8>* %addr, i32 4, <32 x i1>%mask, <32 x i8> z…
128 declare <32 x i8> @llvm.masked.load.v32i8(<32 x i8>*, i32, <32 x i1>, <32 x i8>)
185 call void @llvm.masked.store.v32i8(<32 x i8> %val, <32 x i8>* %addr, i32 4, <32 x i1>%mask)
188 declare void @llvm.masked.store.v32i8(<32 x i8>, <32 x i8>*, i32, <32 x i1>)
Davx-cmp.ll83 define <32 x i8> @v32i8-cmp(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
127 define <32 x i8> @v32i8-cmpeq(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
Dvector-popcnt-256.ll176 %out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %in)
212 …%out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> <i8 256, i8 -1, i8 0, i8 255, i8 -65536, i8 7, i…
219 declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)
Davx2-arith.ll80 ; CHECK: mul-v32i8
101 define <32 x i8> @mul-v32i8(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Davx512-masked_memop-16-8.ll25 …%res = call <32 x i8> @llvm.masked.load.v32i8.p0v32i8(<32 x i8>* %addr, i32 4, <32 x i1>%mask, <32…
28 declare <32 x i8> @llvm.masked.load.v32i8.p0v32i8(<32 x i8>*, i32, <32 x i1>, <32 x i8>)
98 …call void @llvm.masked.store.v32i8.p0v32i8(<32 x i8> %val, <32 x i8>* %addr, i32 4, <32 x i1>%mask)
101 declare void @llvm.masked.store.v32i8.p0v32i8(<32 x i8>, <32 x i8>*, i32, <32 x i1>)
Dbitcast-setcc-256.ll153 define i32 @v32i8(<32 x i8> %a, <32 x i8> %b) {
154 ; SSE2-SSSE3-LABEL: v32i8:
164 ; AVX1-LABEL: v32i8:
177 ; AVX2-LABEL: v32i8:
184 ; AVX512F-LABEL: v32i8:
199 ; AVX512BW-LABEL: v32i8:
Davx512bw-mov.ll119 …%res = call <32 x i8> @llvm.masked.load.v32i8(<32 x i8>* %addr, i32 4, <32 x i1>%mask, <32 x i8> z…
122 declare <32 x i8> @llvm.masked.load.v32i8(<32 x i8>*, i32, <32 x i1>, <32 x i8>)
176 call void @llvm.masked.store.v32i8(<32 x i8> %val, <32 x i8>* %addr, i32 4, <32 x i1>%mask)
179 declare void @llvm.masked.store.v32i8(<32 x i8>, <32 x i8>*, i32, <32 x i1>)
Dbitcast-and-setcc-256.ll369 define i32 @v32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c, <32 x i8> %d) {
370 ; SSE2-SSSE3-LABEL: v32i8:
384 ; AVX1-LABEL: v32i8:
403 ; AVX2-LABEL: v32i8:
412 ; AVX512F-LABEL: v32i8:
433 ; AVX512BW-LABEL: v32i8:
Dprefer-avx256-popcnt.ll98 %out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %in)
105 declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)
/external/llvm/test/Analysis/CostModel/X86/
Dctbits-cost.ll18 declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)
88 %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
102 declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
235 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
244 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1)
258 declare <32 x i8> @llvm.cttz.v32i8(<32 x i8>, i1)
391 %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 0)
400 %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 1)
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Dctlz.ll99 declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
680 …n estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 f…
684 …n estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 f…
688 …n estimated cost of 20 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 f…
692 …an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 f…
696 …an estimated cost of 9 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 f…
700 …n estimated cost of 10 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 f…
703 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
709 …n estimated cost of 34 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 t…
713 …n estimated cost of 18 for instruction: %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 t…
[all …]
Dctpop.ll79 declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)
334 …nd an estimated cost of 20 for instruction: %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
338 …nd an estimated cost of 12 for instruction: %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
342 …nd an estimated cost of 14 for instruction: %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
346 …und an estimated cost of 6 for instruction: %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
350 …und an estimated cost of 6 for instruction: %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
353 %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
Dcttz.ll98 declare <32 x i8> @llvm.cttz.v32i8(<32 x i8>, i1)
599 …n estimated cost of 26 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 f…
603 …n estimated cost of 18 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 f…
607 …n estimated cost of 20 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 f…
611 …an estimated cost of 9 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 f…
615 …an estimated cost of 9 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 f…
618 %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 0)
624 …n estimated cost of 26 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 t…
628 …n estimated cost of 18 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 t…
632 …n estimated cost of 20 for instruction: %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 t…
[all …]
Dbitreverse.ll102 declare <32 x i8> @llvm.bitreverse.v32i8(<32 x i8>)
397 …mated cost of 40 for instruction: %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
401 …mated cost of 10 for instruction: %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
405 …mated cost of 12 for instruction: %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
409 …imated cost of 5 for instruction: %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
413 …imated cost of 5 for instruction: %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
417 …imated cost of 4 for instruction: %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
420 %bitreverse = call <32 x i8> @llvm.bitreverse.v32i8(<32 x i8> %a)
/external/llvm/lib/IR/
DValueTypes.cpp158 case MVT::v32i8: return "v32i8"; in getEVTString()
236 case MVT::v32i8: return VectorType::get(Type::getInt8Ty(Context), 32); in getTypeForEVT()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DValueTypes.cpp155 case MVT::v32i8: return "v32i8"; in getEVTString()
236 case MVT::v32i8: return VectorType::get(Type::getInt8Ty(Context), 32); in getTypeForEVT()

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