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Searched refs:v_dot4_i32_i8 (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Ddl-insts.s382 v_dot4_i32_i8 v0, v1, v2, v3 label
539 v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[0,0] label
541 v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[0,1] label
543 v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[1,0] label
545 v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[1,1] label
547 v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[0,0] label
549 v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[0,1] label
551 v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[1,0] label
553 v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[1,1] label
555 v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[0,0] op_sel_hi:[0,0] label
[all …]
Ddl-insts-err.s20 v_dot4_i32_i8 v0, v1, v2, v3 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.sdot4.ll6 ; GFX906: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} clamp{{$}}
24 ; GFX906: v_dot4_i32_i8 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Ddl-insts.txt549 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa8,0xd3,0x01,0x05,0x0e,0x1c]
777 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 ; encoding: [0x00,0x40,0xa8,0xd3,0x01,0x05,0x0e,0x1c]
780 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[0,1,0] ; encoding: [0x00,0x50,0xa8,0xd3,0x01,0x05,0x0…
783 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[1,0,0] ; encoding: [0x00,0x48,0xa8,0xd3,0x01,0x05,0x0…
786 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel:[1,1,0] ; encoding: [0x00,0x58,0xa8,0xd3,0x01,0x05,0x0…
789 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa8,0xd3,0x01,0x05,…
792 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[0,1,0] ; encoding: [0x00,0x00,0xa8,0xd3,0x01,0x05,…
795 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[1,0,0] ; encoding: [0x00,0x00,0xa8,0xd3,0x01,0x05,…
798 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[1,1,0] ; encoding: [0x00,0x00,0xa8,0xd3,0x01,0x05,…
801 # CHECK: v_dot4_i32_i8 v0, v1, v2, v3 op_sel_hi:[0,0,0] ; encoding: [0x00,0x00,0xa8,0xd3,0x01,0x05,…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP3PInstructions.td173 def V_DOT4_I32_I8 : VOP3PInst<"v_dot4_i32_i8", VOP3_Profile<VOP_I32_I32_I32_I32, VOP3_PACKED>>;