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Searched refs:vadduhm (Results 1 – 20 of 20) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dsplat-bug.ll4 ; of vsplitsh/vadduhm.
15 ; CHECK: vadduhm {{[0-9]+}}, [[REG]], [[REG]]
Dvaddsplat.ll43 ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG1]]
54 ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG1]]
124 ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG2]]
D2008-07-10-SplatMiscompile.ll1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vadduhm
Dvec_constants.ll46 ; CHECK-NEXT: vadduhm
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dsplat-bug.ll4 ; of vsplitsh/vadduhm.
15 ; CHECK: vadduhm {{[0-9]+}}, [[REG]], [[REG]]
Dvaddsplat.ll43 ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG1]]
54 ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG1]]
124 ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG2]]
D2008-07-10-SplatMiscompile.ll1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vadduhm
Dvec_constants.ll46 ; CHECK-NEXT: vadduhm
Dvsx-p9.ll59 ; CHECK: vadduhm 2, 3, 2
68 ; CHECK: vadduhm 2, 3, 2
Dppc64-P9-vabsd.ll50 ; CHECK-NEXT: vadduhm 2, 2, [[IMM:[0-9]+]]
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs53 0x10,0x43,0x20,0x40 = vadduhm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s228 # CHECK-BE: vadduhm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x40]
229 # CHECK-LE: vadduhm 2, 3, 4 # encoding: [0x40,0x20,0x43,0x10]
230 vadduhm 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s228 # CHECK-BE: vadduhm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x40]
229 # CHECK-LE: vadduhm 2, 3, 4 # encoding: [0x40,0x20,0x43,0x10]
230 vadduhm 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt198 # CHECK: vadduhm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt198 # CHECK: vadduhm 2, 3, 4
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2249 V(vadduhm, VADDUHM, 0x10000040) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2499 __ vadduhm(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
2993 __ vadduhm(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td494 "vadduhm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td495 "vadduhm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4327 "\007vaddubm\007vaddubs\007vaddudm\007vadduhm\007vadduhs\007vadduqm\007v"
6433 …{ 10365 /* vadduhm */, PPC::VADDUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC…