/external/boringssl/linux-ppc64le/crypto/aes/ |
D | aesp8-ppc.S | 94 vadduwm 4,4,4 114 vadduwm 4,4,4 172 vadduwm 4,4,4 202 vadduwm 4,4,4 246 vadduwm 4,4,4 1268 vadduwm 4,4,11 1394 vadduwm 7,11,11 1398 vadduwm 16,4,11 1399 vadduwm 17,4,7 1402 vadduwm 18,16,7 [all …]
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/external/boringssl/linux-ppc64le/crypto/fipsmodule/ |
D | aesp8-ppc.S | 108 vadduwm 4,4,4 128 vadduwm 4,4,4 186 vadduwm 4,4,4 216 vadduwm 4,4,4 260 vadduwm 4,4,4 1297 vadduwm 4,4,11 1423 vadduwm 7,11,11 1427 vadduwm 16,4,11 1428 vadduwm 17,4,7 1431 vadduwm 18,16,7 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | swaps-le-1.ll | 124 ; CHECK-DAG: vadduwm 131 ; CHECK-DAG: vadduwm 138 ; CHECK-DAG: vadduwm 145 ; CHECK-DAG: vadduwm 157 ; NOOPTSWAP-DAG: vadduwm 179 ; CHECK-P9-DAG: vadduwm 180 ; CHECK-P9-DAG: vadduwm 181 ; CHECK-P9-DAG: vadduwm 182 ; CHECK-P9-DAG: vadduwm
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D | signbit-shift.ll | 90 ; CHECK-NEXT: vadduwm 2, 2, 3 205 ; CHECK-NEXT: vadduwm 2, 2, 3 235 ; CHECK-NEXT: vadduwm 2, 2, 3 261 ; CHECK-NEXT: vadduwm 2, 3, 2 289 ; CHECK-NEXT: vadduwm 2, 2, 3
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D | vaddsplat.ll | 21 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]] 32 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]] 100 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG2]]
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D | vselect-constants.ll | 55 ; CHECK-NEXT: vadduwm 2, 2, 3 86 ; CHECK-NEXT: vadduwm 2, 2, 3 99 ; CHECK-NEXT: vadduwm 2, 2, 3 135 ; CHECK-NEXT: vadduwm 2, 2, 4
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D | vec_constants.ll | 27 ; CHECK-NEXT: vadduwm
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D | vsx-p9.ll | 77 ; CHECK: vadduwm 2, 3, 2 86 ; CHECK: vadduwm 2, 3, 2
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D | vsx.ll | 1147 ; CHECK-REG: vadduwm 2, 2, 3 1160 ; CHECK-FISL: vadduwm 1171 ; CHECK-LE: vadduwm 2, 2, 3
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/external/llvm/test/CodeGen/PowerPC/ |
D | swaps-le-1.ll | 105 ; CHECK-DAG: vadduwm 112 ; CHECK-DAG: vadduwm 119 ; CHECK-DAG: vadduwm 126 ; CHECK-DAG: vadduwm 139 ; NOOPTSWAP-DAG: vadduwm
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D | vaddsplat.ll | 21 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]] 32 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]] 100 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG2]]
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D | vec_constants.ll | 27 ; CHECK-NEXT: vadduwm
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D | vsx.ll | 1222 ; CHECK-REG: vadduwm 2, 2, 3 1235 ; CHECK-FISL: vadduwm 1246 ; CHECK-LE: vadduwm 2, 2, 3
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-vmx.s.cs | 54 0x10,0x43,0x20,0x80 = vadduwm 2, 3, 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-vmx.s | 231 # CHECK-BE: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80] 232 # CHECK-LE: vadduwm 2, 3, 4 # encoding: [0x80,0x20,0x43,0x10] 233 vadduwm 2, 3, 4
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-vmx.s | 231 # CHECK-BE: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80] 232 # CHECK-LE: vadduwm 2, 3, 4 # encoding: [0x80,0x20,0x43,0x10] 233 vadduwm 2, 3, 4
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 201 # CHECK: vadduwm 2, 3, 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 201 # CHECK: vadduwm 2, 3, 4
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/external/v8/src/codegen/ppc/ |
D | constants-ppc.h | 2247 V(vadduwm, VADDUWM, 0x10000080) \
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/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 2474 __ vadduwm(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local 2972 __ vadduwm(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1); in AssembleArchInstruction() local
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrAltivec.td | 497 "vadduwm $vD, $vA, $vB", IIC_VecGeneral,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrAltivec.td | 498 "vadduwm $vD, $vA, $vB", IIC_VecGeneral,
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 6436 …{ 10389 /* vadduwm */, PPC::VADDUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC…
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