Home
last modified time | relevance | path

Searched refs:vadduwm (Results 1 – 23 of 23) sorted by relevance

/external/boringssl/linux-ppc64le/crypto/aes/
Daesp8-ppc.S94 vadduwm 4,4,4
114 vadduwm 4,4,4
172 vadduwm 4,4,4
202 vadduwm 4,4,4
246 vadduwm 4,4,4
1268 vadduwm 4,4,11
1394 vadduwm 7,11,11
1398 vadduwm 16,4,11
1399 vadduwm 17,4,7
1402 vadduwm 18,16,7
[all …]
/external/boringssl/linux-ppc64le/crypto/fipsmodule/
Daesp8-ppc.S108 vadduwm 4,4,4
128 vadduwm 4,4,4
186 vadduwm 4,4,4
216 vadduwm 4,4,4
260 vadduwm 4,4,4
1297 vadduwm 4,4,11
1423 vadduwm 7,11,11
1427 vadduwm 16,4,11
1428 vadduwm 17,4,7
1431 vadduwm 18,16,7
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dswaps-le-1.ll124 ; CHECK-DAG: vadduwm
131 ; CHECK-DAG: vadduwm
138 ; CHECK-DAG: vadduwm
145 ; CHECK-DAG: vadduwm
157 ; NOOPTSWAP-DAG: vadduwm
179 ; CHECK-P9-DAG: vadduwm
180 ; CHECK-P9-DAG: vadduwm
181 ; CHECK-P9-DAG: vadduwm
182 ; CHECK-P9-DAG: vadduwm
Dsignbit-shift.ll90 ; CHECK-NEXT: vadduwm 2, 2, 3
205 ; CHECK-NEXT: vadduwm 2, 2, 3
235 ; CHECK-NEXT: vadduwm 2, 2, 3
261 ; CHECK-NEXT: vadduwm 2, 3, 2
289 ; CHECK-NEXT: vadduwm 2, 2, 3
Dvaddsplat.ll21 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]]
32 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]]
100 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG2]]
Dvselect-constants.ll55 ; CHECK-NEXT: vadduwm 2, 2, 3
86 ; CHECK-NEXT: vadduwm 2, 2, 3
99 ; CHECK-NEXT: vadduwm 2, 2, 3
135 ; CHECK-NEXT: vadduwm 2, 2, 4
Dvec_constants.ll27 ; CHECK-NEXT: vadduwm
Dvsx-p9.ll77 ; CHECK: vadduwm 2, 3, 2
86 ; CHECK: vadduwm 2, 3, 2
Dvsx.ll1147 ; CHECK-REG: vadduwm 2, 2, 3
1160 ; CHECK-FISL: vadduwm
1171 ; CHECK-LE: vadduwm 2, 2, 3
/external/llvm/test/CodeGen/PowerPC/
Dswaps-le-1.ll105 ; CHECK-DAG: vadduwm
112 ; CHECK-DAG: vadduwm
119 ; CHECK-DAG: vadduwm
126 ; CHECK-DAG: vadduwm
139 ; NOOPTSWAP-DAG: vadduwm
Dvaddsplat.ll21 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]]
32 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]]
100 ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG2]]
Dvec_constants.ll27 ; CHECK-NEXT: vadduwm
Dvsx.ll1222 ; CHECK-REG: vadduwm 2, 2, 3
1235 ; CHECK-FISL: vadduwm
1246 ; CHECK-LE: vadduwm 2, 2, 3
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs54 0x10,0x43,0x20,0x80 = vadduwm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s231 # CHECK-BE: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80]
232 # CHECK-LE: vadduwm 2, 3, 4 # encoding: [0x80,0x20,0x43,0x10]
233 vadduwm 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s231 # CHECK-BE: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80]
232 # CHECK-LE: vadduwm 2, 3, 4 # encoding: [0x80,0x20,0x43,0x10]
233 vadduwm 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt201 # CHECK: vadduwm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt201 # CHECK: vadduwm 2, 3, 4
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2247 V(vadduwm, VADDUWM, 0x10000080) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2474 __ vadduwm(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
2972 __ vadduwm(i.OutputSimd128Register(), kScratchDoubleReg, tempFPReg1); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td497 "vadduwm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td498 "vadduwm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc6436 …{ 10389 /* vadduwm */, PPC::VADDUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC…