Home
last modified time | relevance | path

Searched refs:vcmpequh (Results 1 – 23 of 23) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dvsx-spill-norwstore.ll30 …%2 = tail call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> %0, <8 x i16> <i16 0, i16 -1, i16…
38 …%3 = tail call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> %1, <8 x i16> <i16 -1, i16 0, i16…
59 declare i32 @llvm.ppc.altivec.vcmpequh.p(i32, <8 x i16>, <8 x i16>) #1
Dvec_cmp.ll152 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
161 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
173 ; CHECK: vcmpequh 2, 2, 3
182 ; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3
268 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
269 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
278 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
279 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
280 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
281 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
Dvsx.ll527 ; CHECK-REG: vcmpequh {{[0-9]+}}, 4, 5
532 ; CHECK-FISL: vcmpequh 4, 4, 5
541 ; CHECK-LE: vcmpequh {{[0-9]+}}, 4, 5
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs110 0x10,0x43,0x20,0x46 = vcmpequh 2, 3, 4
111 0x10,0x43,0x24,0x46 = vcmpequh. 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvsx-spill-norwstore.ll32 …%2 = tail call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> %0, <8 x i16> <i16 0, i16 -1, i16…
40 …%3 = tail call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> %1, <8 x i16> <i16 -1, i16 0, i16…
61 declare i32 @llvm.ppc.altivec.vcmpequh.p(i32, <8 x i16>, <8 x i16>) #1
Dvec_cmp.ll152 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
161 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
173 ; CHECK: vcmpequh 2, 2, 3
182 ; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3
268 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
269 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
278 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
279 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
280 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
281 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
Dvsx.ll474 ; CHECK-REG: vcmpequh {{[0-9]+}}, 4, 5
479 ; CHECK-FISL: vcmpequh 4, 4, 5
484 ; CHECK-LE: vcmpequh {{[0-9]+}}, 4, 5
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s466 # CHECK-BE: vcmpequh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x46]
467 # CHECK-LE: vcmpequh 2, 3, 4 # encoding: [0x46,0x20,0x43,0x10]
468 vcmpequh 2, 3, 4
469 # CHECK-BE: vcmpequh. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x46]
470 # CHECK-LE: vcmpequh. 2, 3, 4 # encoding: [0x46,0x24,0x43,0x10]
471 vcmpequh. 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s466 # CHECK-BE: vcmpequh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x46]
467 # CHECK-LE: vcmpequh 2, 3, 4 # encoding: [0x46,0x20,0x43,0x10]
468 vcmpequh 2, 3, 4
469 # CHECK-BE: vcmpequh. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x46]
470 # CHECK-LE: vcmpequh. 2, 3, 4 # encoding: [0x46,0x24,0x43,0x10]
471 vcmpequh. 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt426 # CHECK: vcmpequh 2, 3, 4
429 # CHECK: vcmpequh. 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt426 # CHECK: vcmpequh 2, 3, 4
429 # CHECK: vcmpequh. 2, 3, 4
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2660 __ vcmpequh(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
2688 __ vcmpequh(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local
2773 __ vcmpequh(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local
2787 __ vcmpequh(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td803 def VCMPEQUH : VCMP < 70, "vcmpequh $vD, $vA, $vB" , v8i16>;
804 def VCMPEQUHo : VCMPo< 70, "vcmpequh. $vD, $vA, $vB", v8i16>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td810 def VCMPEQUH : VCMP < 70, "vcmpequh $vD, $vA, $vB" , v8i16>;
811 def VCMPEQUHo : VCMPo< 70, "vcmpequh. $vD, $vA, $vB", v8i16>;
/external/v8/src/codegen/ppc/
Dconstants-ppc.h1108 V(vcmpequh, VCMPEQUH, 0x10000046) \
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4331 "cmpbfp\010vcmpeqfp\010vcmpequb\010vcmpequd\010vcmpequh\010vcmpequw\010v"
6465 …{ 10574 /* vcmpequh */, PPC::VCMPEQUH, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVR…
6466 …{ 10574 /* vcmpequh */, PPC::VCMPEQUHo, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, 0, { MCK__DOT…
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc4798 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
4799 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
DIntrinsicImpl.inc4824 "llvm.ppc.altivec.vcmpequh",
4825 "llvm.ppc.altivec.vcmpequh.p",
13702 1, // llvm.ppc.altivec.vcmpequh
13703 1, // llvm.ppc.altivec.vcmpequh.p
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3854 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
3855 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
9878 "llvm.ppc.altivec.vcmpequh",
9879 "llvm.ppc.altivec.vcmpequh.p",
17763 1, // llvm.ppc.altivec.vcmpequh
17764 1, // llvm.ppc.altivec.vcmpequh.p
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3860 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
3861 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
9918 "llvm.ppc.altivec.vcmpequh",
9919 "llvm.ppc.altivec.vcmpequh.p",
17858 1, // llvm.ppc.altivec.vcmpequh
17859 1, // llvm.ppc.altivec.vcmpequh.p
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3860 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
3861 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
9918 "llvm.ppc.altivec.vcmpequh",
9919 "llvm.ppc.altivec.vcmpequh.p",
17858 1, // llvm.ppc.altivec.vcmpequh
17859 1, // llvm.ppc.altivec.vcmpequh.p
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3860 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
3861 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
9918 "llvm.ppc.altivec.vcmpequh",
9919 "llvm.ppc.altivec.vcmpequh.p",
17858 1, // llvm.ppc.altivec.vcmpequh
17859 1, // llvm.ppc.altivec.vcmpequh.p
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3860 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh
3861 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p
9918 "llvm.ppc.altivec.vcmpequh",
9919 "llvm.ppc.altivec.vcmpequh.p",
17858 1, // llvm.ppc.altivec.vcmpequh
17859 1, // llvm.ppc.altivec.vcmpequh.p