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Searched refs:vcmpgtsw (Results 1 – 22 of 22) sorted by relevance

/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs118 0x10,0x43,0x23,0x86 = vcmpgtsw 2, 3, 4
119 0x10,0x43,0x27,0x86 = vcmpgtsw. 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
DvsxD-Form-spills.ll41 %0 = tail call i32 @llvm.ppc.altivec.vcmpgtsw.p(i32 2, <4 x i32> %a, <4 x i32> %b)
65 declare i32 @llvm.ppc.altivec.vcmpgtsw.p(i32, <4 x i32>, <4 x i32>)
Dsetcc-logic.ll330 ; CHECK-NEXT: vcmpgtsw 2, 2, 4
356 ; CHECK-NEXT: vcmpgtsw 2, 4, 2
383 ; CHECK-NEXT: vcmpgtsw 2, 4, 2
410 ; CHECK-NEXT: vcmpgtsw 2, 2, 4
Dvec_cmp.ll321 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 2, 3
341 ; CHECK: vcmpgtsw 2, 3, 2
359 ; CHECK: vcmpgtsw 2, 2, 3
377 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 3, 2
Dsignbit-shift.ll35 ; CHECK-NEXT: vcmpgtsw 2, 2, 3
88 ; CHECK-NEXT: vcmpgtsw 2, 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s496 # CHECK-BE: vcmpgtsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x86]
497 # CHECK-LE: vcmpgtsw 2, 3, 4 # encoding: [0x86,0x23,0x43,0x10]
498 vcmpgtsw 2, 3, 4
499 # CHECK-BE: vcmpgtsw. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x86]
500 # CHECK-LE: vcmpgtsw. 2, 3, 4 # encoding: [0x86,0x27,0x43,0x10]
501 vcmpgtsw. 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s496 # CHECK-BE: vcmpgtsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x86]
497 # CHECK-LE: vcmpgtsw 2, 3, 4 # encoding: [0x86,0x23,0x43,0x10]
498 vcmpgtsw 2, 3, 4
499 # CHECK-BE: vcmpgtsw. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x86]
500 # CHECK-LE: vcmpgtsw. 2, 3, 4 # encoding: [0x86,0x27,0x43,0x10]
501 vcmpgtsw. 2, 3, 4
/external/llvm/test/CodeGen/PowerPC/
Dvec_cmp.ll321 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 2, 3
341 ; CHECK: vcmpgtsw 2, 3, 2
359 ; CHECK: vcmpgtsw 2, 2, 3
377 ; CHECK: vcmpgtsw [[RET:[0-9]+]], 3, 2
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt456 # CHECK: vcmpgtsw 2, 3, 4
459 # CHECK: vcmpgtsw. 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt456 # CHECK: vcmpgtsw 2, 3, 4
459 # CHECK: vcmpgtsw. 2, 3, 4
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td813 def VCMPGTSW : VCMP <902, "vcmpgtsw $vD, $vA, $vB" , v4i32>;
814 def VCMPGTSWo : VCMPo<902, "vcmpgtsw. $vD, $vA, $vB", v4i32>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td820 def VCMPGTSW : VCMP <902, "vcmpgtsw $vD, $vA, $vB" , v4i32>;
821 def VCMPGTSWo : VCMPo<902, "vcmpgtsw. $vD, $vA, $vB", v4i32>;
/external/v8/src/codegen/ppc/
Dconstants-ppc.h1122 V(vcmpgtsw, VCMPGTSW, 0x10000386) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2715 __ vcmpgtsw(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
2731 __ vcmpgtsw(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4332 "cmpgefp\010vcmpgtfp\010vcmpgtsb\010vcmpgtsd\010vcmpgtsh\010vcmpgtsw\010"
6479 …{ 10637 /* vcmpgtsw */, PPC::VCMPGTSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVR…
6480 …{ 10637 /* vcmpgtsw */, PPC::VCMPGTSWo, Convert__RegVRRC1_1__RegVRRC1_2__RegVRRC1_3, 0, { MCK__DOT…
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc4812 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
4813 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
DIntrinsicImpl.inc4838 "llvm.ppc.altivec.vcmpgtsw",
4839 "llvm.ppc.altivec.vcmpgtsw.p",
13716 1, // llvm.ppc.altivec.vcmpgtsw
13717 1, // llvm.ppc.altivec.vcmpgtsw.p
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3868 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
3869 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
9892 "llvm.ppc.altivec.vcmpgtsw",
9893 "llvm.ppc.altivec.vcmpgtsw.p",
17777 1, // llvm.ppc.altivec.vcmpgtsw
17778 1, // llvm.ppc.altivec.vcmpgtsw.p
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3874 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
3875 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
9932 "llvm.ppc.altivec.vcmpgtsw",
9933 "llvm.ppc.altivec.vcmpgtsw.p",
17872 1, // llvm.ppc.altivec.vcmpgtsw
17873 1, // llvm.ppc.altivec.vcmpgtsw.p
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3874 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
3875 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
9932 "llvm.ppc.altivec.vcmpgtsw",
9933 "llvm.ppc.altivec.vcmpgtsw.p",
17872 1, // llvm.ppc.altivec.vcmpgtsw
17873 1, // llvm.ppc.altivec.vcmpgtsw.p
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3874 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
3875 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
9932 "llvm.ppc.altivec.vcmpgtsw",
9933 "llvm.ppc.altivec.vcmpgtsw.p",
17872 1, // llvm.ppc.altivec.vcmpgtsw
17873 1, // llvm.ppc.altivec.vcmpgtsw.p
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3874 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw
3875 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p
9932 "llvm.ppc.altivec.vcmpgtsw",
9933 "llvm.ppc.altivec.vcmpgtsw.p",
17872 1, // llvm.ppc.altivec.vcmpgtsw
17873 1, // llvm.ppc.altivec.vcmpgtsw.p