Searched refs:vextractd (Results 1 – 12 of 12) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-vmx.s | 801 # CHECK-BE: vextractd 2, 3, 8 # encoding: [0x10,0x48,0x1a,0xcd] 802 # CHECK-LE: vextractd 2, 3, 8 # encoding: [0xcd,0x1a,0x48,0x10] 803 vextractd 2, 3, 8
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-vmx.s | 795 # CHECK-BE: vextractd 2, 3, 8 # encoding: [0x10,0x48,0x1a,0xcd] 796 # CHECK-LE: vextractd 2, 3, 8 # encoding: [0xcd,0x1a,0x48,0x10] 797 vextractd 2, 3, 8
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 722 # CHECK: vextractd 2, 3, 8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 722 # CHECK: vextractd 2, 3, 8
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/external/llvm/lib/Target/PowerPC/ |
D | p9-instrs.txt | 437 [PO VRT / UIM VRB XO] vextractub vextractuh vextractuw vextractd
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D | README_P9.txt | 11 - Vector Extract Unsigned: vextractub vextractuh vextractuw vextractd
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D | PPCInstrAltivec.td | 1265 def VEXTRACTD : VX1_VT5_UIM5_VB5<717, "vextractd" , []>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | README_P9.txt | 11 - Vector Extract Unsigned: vextractub vextractuh vextractuw vextractd
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D | PPCInstrAltivec.td | 1306 def VEXTRACTD : VX1_VT5_UIM5_VB5<717, "vextractd" , []>;
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/external/v8/src/codegen/ppc/ |
D | constants-ppc.h | 2223 V(vextractd, VEXTRACTD, 0x100002CD) \
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/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 2283 __ vextractd(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local 2299 __ vextractd(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 6510 …{ 10794 /* vextractd */, PPC::VEXTRACTD, Convert__RegVRRC1_0__U4Imm1_2__RegVRRC1_1, 0, { MCK_RegVR…
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