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Searched refs:vinsertb (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dp9-vinsert-vextract.ll293 ; CHECK: vinsertb 2, 3, 15
296 ; CHECK-BE: vinsertb 2, 3, 0
305 ; CHECK: vinsertb 2, 3, 14
308 ; CHECK-BE: vinsertb 2, 3, 1
317 ; CHECK: vinsertb 2, 3, 13
320 ; CHECK-BE: vinsertb 2, 3, 2
329 ; CHECK: vinsertb 2, 3, 12
332 ; CHECK-BE: vinsertb 2, 3, 3
341 ; CHECK: vinsertb 2, 3, 11
344 ; CHECK-BE: vinsertb 2, 3, 4
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s826 # CHECK-BE: vinsertb 2, 3, 15 # encoding: [0x10,0x4f,0x1b,0x0d]
827 # CHECK-LE: vinsertb 2, 3, 15 # encoding: [0x0d,0x1b,0x4f,0x10]
828 vinsertb 2, 3, 15
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s820 # CHECK-BE: vinsertb 2, 3, 15 # encoding: [0x10,0x4f,0x1b,0x0d]
821 # CHECK-LE: vinsertb 2, 3, 15 # encoding: [0x0d,0x1b,0x4f,0x10]
822 vinsertb 2, 3, 15
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt743 # CHECK: vinsertb 2, 3, 15
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt743 # CHECK: vinsertb 2, 3, 15
/external/llvm/lib/Target/PowerPC/
Dp9-instrs.txt434 [PO VRT / UIM VRB XO] vinsertb vinsertd vinserth vinsertw
DREADME_P9.txt32 - Vector Insert Element Instructions: vinsertb vinsertd vinserth vinsertw
DPPCInstrAltivec.td1276 def VINSERTB : VX1_VT5_UIM5_VB5<781, "vinsertb", []>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DREADME_P9.txt32 - Vector Insert Element Instructions: vinsertb vinsertd vinserth vinsertw
DPPCInstrAltivec.td1319 "vinsertb $vD, $vB, $UIM", IIC_VecGeneral,
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2225 V(vinsertb, VINSERTB, 0x1000030D) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2390 __ vinsertb(dst, kScratchDoubleReg, Operand(15 - i.InputInt8(1))); in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4338 "vextuwlx\010vextuwrx\005vgbbd\010vinsertb\010vinsertd\010vinserth\010vi"
6526 …{ 10942 /* vinsertb */, PPC::VINSERTB, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, 0, { M…