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Searched refs:vinserth (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dp9-vinsert-vextract.ll16 ; CHECK: vinserth 2, 3, 14
19 ; CHECK-BE: vinserth 2, 3, 0
28 ; CHECK: vinserth 2, 3, 12
31 ; CHECK-BE: vinserth 2, 3, 2
40 ; CHECK: vinserth 2, 3, 10
43 ; CHECK-BE: vinserth 2, 3, 4
52 ; CHECK: vinserth 2, 3, 8
55 ; CHECK-BE: vinserth 2, 3, 6
64 ; CHECK: vinserth 2, 3, 6
67 ; CHECK-BE: vinserth 2, 3, 8
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s829 # CHECK-BE: vinserth 2, 3, 14 # encoding: [0x10,0x4e,0x1b,0x4d]
830 # CHECK-LE: vinserth 2, 3, 14 # encoding: [0x4d,0x1b,0x4e,0x10]
831 vinserth 2, 3, 14
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s823 # CHECK-BE: vinserth 2, 3, 14 # encoding: [0x10,0x4e,0x1b,0x4d]
824 # CHECK-LE: vinserth 2, 3, 14 # encoding: [0x4d,0x1b,0x4e,0x10]
825 vinserth 2, 3, 14
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt746 # CHECK: vinserth 2, 3, 14
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt746 # CHECK: vinserth 2, 3, 14
/external/llvm/lib/Target/PowerPC/
Dp9-instrs.txt434 [PO VRT / UIM VRB XO] vinsertb vinsertd vinserth vinsertw
DREADME_P9.txt32 - Vector Insert Element Instructions: vinsertb vinsertd vinserth vinsertw
DPPCInstrAltivec.td1277 def VINSERTH : VX1_VT5_UIM5_VB5<845, "vinserth", []>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DREADME_P9.txt32 - Vector Insert Element Instructions: vinsertb vinsertd vinserth vinsertw
DPPCInstrAltivec.td1325 "vinserth $vD, $vB, $UIM", IIC_VecGeneral,
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2227 V(vinserth, VINSERTH, 0x1000034D) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2382 __ vinserth(dst, kScratchDoubleReg, in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4338 "vextuwlx\010vextuwrx\005vgbbd\010vinsertb\010vinsertd\010vinserth\010vi"
6528 …{ 10960 /* vinserth */, PPC::VINSERTH, Convert__RegVRRC1_0__Tie0_1_1__U4Imm1_2__RegVRRC1_1, 0, { M…