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Searched refs:vminsw (Results 1 – 19 of 19) sorted by relevance

/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs104 0x10,0x43,0x23,0x82 = vminsw 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s439 # CHECK-BE: vminsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x82]
440 # CHECK-LE: vminsw 2, 3, 4 # encoding: [0x82,0x23,0x43,0x10]
441 vminsw 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s439 # CHECK-BE: vminsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x82]
440 # CHECK-LE: vminsw 2, 3, 4 # encoding: [0x82,0x23,0x43,0x10]
441 vminsw 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt402 # CHECK: vminsw 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt402 # CHECK: vminsw 2, 3, 4
/external/llvm/include/llvm/IR/
DIntrinsicsPowerPC.td352 def int_ppc_altivec_vminsw : PowerPC_Vec_WWW_Intrinsic<"vminsw">;
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsPowerPC.td426 def int_ppc_altivec_vminsw : PowerPC_Vec_WWW_Intrinsic<"vminsw">;
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2309 V(vminsw, VMINSW, 0x10000382) \
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td577 def VMINSW : VX1_Int_Ty< 898, "vminsw", int_ppc_altivec_vminsw, v4i32>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td578 def VMINSW : VX1_Int_Ty< 898, "vminsw", int_ppc_altivec_vminsw, v4i32>;
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2549 __ vminsw(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4341 "vminfp\006vminsb\006vminsd\006vminsh\006vminsw\006vminub\006vminud\006v"
6547 …{ 11106 /* vminsw */, PPC::VMINSW, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC, …
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc4856 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
DIntrinsicImpl.inc4882 "llvm.ppc.altivec.vminsw",
13760 1, // llvm.ppc.altivec.vminsw
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3912 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
9936 "llvm.ppc.altivec.vminsw",
17821 1, // llvm.ppc.altivec.vminsw
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3918 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
9976 "llvm.ppc.altivec.vminsw",
17916 1, // llvm.ppc.altivec.vminsw
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3918 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
9976 "llvm.ppc.altivec.vminsw",
17916 1, // llvm.ppc.altivec.vminsw
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3918 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
9976 "llvm.ppc.altivec.vminsw",
17916 1, // llvm.ppc.altivec.vminsw
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3918 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw
9976 "llvm.ppc.altivec.vminsw",
17916 1, // llvm.ppc.altivec.vminsw