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Searched refs:vmuleub (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvec_mul.ll53 ; CHECK: vmuleub
57 ; CHECK-LE: vmuleub [[REG2:[0-9]+]]
62 ; CHECK-VSX: vmuleub
66 ; CHECK-LE-VSX: vmuleub [[REG2:[0-9]+]]
/external/llvm/test/CodeGen/PowerPC/
Dvec_mul.ll53 ; CHECK: vmuleub
57 ; CHECK-LE: vmuleub [[REG2:[0-9]+]]
62 ; CHECK-VSX: vmuleub
66 ; CHECK-LE-VSX: vmuleub [[REG2:[0-9]+]]
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs70 0x10,0x43,0x22,0x08 = vmuleub 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s314 # CHECK-BE: vmuleub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x08]
315 # CHECK-LE: vmuleub 2, 3, 4 # encoding: [0x08,0x22,0x43,0x10]
316 vmuleub 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s314 # CHECK-BE: vmuleub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x08]
315 # CHECK-LE: vmuleub 2, 3, 4 # encoding: [0x08,0x22,0x43,0x10]
316 vmuleub 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt282 # CHECK: vmuleub 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt282 # CHECK: vmuleub 2, 3, 4
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2269 V(vmuleub, VMULEUB, 0x10000208) \
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td620 def VMULEUB : VX1_Int_Ty2<520, "vmuleub", int_ppc_altivec_vmuleub,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td621 def VMULEUB : VX1_Int_Ty2<520, "vmuleub", int_ppc_altivec_vmuleub,
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2535 __ vmuleub(kScratchDoubleReg, i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4345 "l10euq\010vmul10uq\007vmulesb\007vmulesh\007vmulesw\007vmuleub\007vmule"
6575 …{ 11329 /* vmuleub */, PPC::VMULEUB, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC…
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc4871 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
DIntrinsicImpl.inc4897 "llvm.ppc.altivec.vmuleub",
13775 1, // llvm.ppc.altivec.vmuleub
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3927 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
9951 "llvm.ppc.altivec.vmuleub",
17836 1, // llvm.ppc.altivec.vmuleub
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3933 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
9991 "llvm.ppc.altivec.vmuleub",
17931 1, // llvm.ppc.altivec.vmuleub
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3933 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
9991 "llvm.ppc.altivec.vmuleub",
17931 1, // llvm.ppc.altivec.vmuleub
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3933 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
9991 "llvm.ppc.altivec.vmuleub",
17931 1, // llvm.ppc.altivec.vmuleub
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3933 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub
9991 "llvm.ppc.altivec.vmuleub",
17931 1, // llvm.ppc.altivec.vmuleub