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Searched refs:vmuluwm (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dswaps-le-1.ll125 ; CHECK: vmuluwm
132 ; CHECK: vmuluwm
139 ; CHECK: vmuluwm
146 ; CHECK: vmuluwm
158 ; NOOPTSWAP: vmuluwm
183 ; CHECK-P9-DAG: vmuluwm
184 ; CHECK-P9-DAG: vmuluwm
185 ; CHECK-P9-DAG: vmuluwm
186 ; CHECK-P9-DAG: vmuluwm
Dvec_mul_even_odd.ll10 declare <4 x i32> @llvm.ppc.altivec.vmuluwm(<4 x i32>, <4 x i32>) nounwind readnone
40 ; CHECK: vmuluwm 2, 2, 3
/external/llvm/test/CodeGen/PowerPC/
Dswaps-le-1.ll106 ; CHECK: vmuluwm
113 ; CHECK: vmuluwm
120 ; CHECK: vmuluwm
127 ; CHECK: vmuluwm
140 ; NOOPTSWAP: vmuluwm
Dvec_mul_even_odd.ll10 declare <4 x i32> @llvm.ppc.altivec.vmuluwm(<4 x i32>, <4 x i32>) nounwind readnone
40 ; CHECK: vmuluwm 2, 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s341 # CHECK-BE: vmuluwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x89]
342 # CHECK-LE: vmuluwm 2, 3, 4 # encoding: [0x89,0x20,0x43,0x10]
343 vmuluwm 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s341 # CHECK-BE: vmuluwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x89]
342 # CHECK-LE: vmuluwm 2, 3, 4 # encoding: [0x89,0x20,0x43,0x10]
343 vmuluwm 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt309 # CHECK: vmuluwm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt309 # CHECK: vmuluwm 2, 3, 4
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2265 V(vmuluwm, VMULUWM, 0x10000089) \
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td1030 "vmuluwm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td1070 "vmuluwm $vD, $vA, $vB", IIC_VecGeneral,
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2494 __ vmuluwm(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4347 "vmulouw\007vmuluwm\005vnand\010vncipher\014vncipherlast\005vnegd\005vne"
6584 …{ 11401 /* vmuluwm */, PPC::VMULUWM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC…