| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | vsx-partword-int-loads-and-stores.ll | 13 ; CHECK-NEXT: vspltb 2, 2, 7
16 ; CHECK-BE-NEXT: vspltb 2, 2, 7
76 ; CHECK-NEXT: vspltb 2, 2, 7
79 ; CHECK-BE-NEXT: vspltb 2, 2, 7
177 ; CHECK-NEXT: vspltb 2, 2, 7
180 ; CHECK-BE-NEXT: vspltb 2, 2, 7
228 ; CHECK-NEXT: vspltb 2, 2, 7
231 ; CHECK-BE-NEXT: vspltb 2, 2, 7
322 ; CHECK-NEXT: vspltb 2, 2, 7
326 ; CHECK-BE-NEXT: vspltb 2, 2, 7
[all …]
|
| D | shift128.ll | 54 ; P9-DAG: vspltb
72 ; P9-DAG: vspltb
|
| D | swaps-le-2.ll | 87 ; CHECK: vspltb {{[0-9]+}}, {{[0-9]+}}, 2
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding-vmx.s.cs | 35 0x10,0x41,0x1a,0x0c = vspltb 2, 3, 1
|
| /external/boringssl/linux-ppc64le/crypto/modes/ |
| D | ghashp8-ppc.S | 26 vspltb 6,9,0
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | swaps-le-2.ll | 80 ; CHECK: vspltb {{[0-9]+}}, {{[0-9]+}}, 2
|
| /external/boringssl/linux-ppc64le/crypto/fipsmodule/ |
| D | ghashp8-ppc.S | 40 vspltb 6,9,0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-vmx.s | 120 # CHECK-BE: vspltb 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x0c]
121 # CHECK-LE: vspltb 2, 3, 1 # encoding: [0x0c,0x1a,0x41,0x10]
122 vspltb 2, 3, 1
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-vmx.s | 120 # CHECK-BE: vspltb 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x0c]
121 # CHECK-LE: vspltb 2, 3, 1 # encoding: [0x0c,0x1a,0x41,0x10]
122 vspltb 2, 3, 1
|
| /external/v8/src/compiler/backend/ppc/ |
| D | code-generator-ppc.cc | 2278 __ vspltb(dst, dst, Operand(7)); in AssembleArchInstruction() local
2425 __ vspltb(tempFPReg2, tempFPReg2, Operand(7)); in AssembleArchInstruction() local
2826 __ vspltb(kScratchDoubleReg, kScratchDoubleReg, Operand(7)); \ in AssembleArchInstruction()
2981 __ vspltb(kScratchDoubleReg, kScratchDoubleReg, Operand(7)); in AssembleArchInstruction() local
3002 __ vspltb(kScratchDoubleReg, kScratchDoubleReg, Operand(7)); in AssembleArchInstruction() local
3012 __ vspltb(kScratchDoubleReg, kScratchDoubleReg, Operand(7)); in AssembleArchInstruction() local
3023 __ vspltb(kScratchDoubleReg, kScratchDoubleReg, Operand(7)); in AssembleArchInstruction() local
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-vmx.txt | 108 # CHECK: vspltb 2, 3, 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-vmx.txt | 108 # CHECK: vspltb 2, 3, 1
|
| /external/llvm/lib/Target/PowerPC/ |
| D | p9-instrs.txt | 432 // vector extract (p.287) ref: vspltb (v2.07, p.227)
|
| D | PPCInstrAltivec.td | 698 "vspltb $vD, $vB, $UIMM", IIC_VecPerm,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrAltivec.td | 699 "vspltb $vD, $vB, $UIMM", IIC_VecPerm,
712 "vspltb $vD, $vB, $UIMM", IIC_VecPerm, []>;
|
| /external/v8/src/codegen/ppc/ |
| D | constants-ppc.h | 2211 V(vspltb, VSPLTB, 0x1000020C) \
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenAsmMatcher.inc | 4356 "slw\006vspltb\006vsplth\010vspltisb\010vspltish\010vspltisw\006vspltw\003"
6648 …{ 11855 /* vspltb */, PPC::VSPLTB, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, 0, { MCK_RegVRRC, MC…
|