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Searched refs:vspltw (Results 1 – 19 of 19) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dpr24216.ll14 ; CHECK-NOT: vspltw
Dvec_splat.ll5 ; RUN: grep vspltw %t | count 2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dpr24216.ll14 ; CHECK-NOT: vspltw
Dvec_splat.ll5 ; RUN: grep vspltw %t | count 2
Df128-vecExtractNconv.ll171 ; CHECK-NEXT: vspltw v2, v2, 3
178 ; CHECK-BE: vspltw v2, v2, 0
194 ; CHECK-NEXT: vspltw v2, v2, 2
222 ; CHECK-BE: vspltw v2, v2, 2
238 ; CHECK-NEXT: vspltw v2, v2, 0
245 ; CHECK-BE: vspltw v2, v2, 3
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs37 0x10,0x41,0x1a,0x8c = vspltw 2, 3, 1
/external/boringssl/linux-ppc64le/crypto/aes/
Daesp8-ppc.S169 vspltw 6,1,3
199 vspltw 6,1,3
256 vspltw 3,1,3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s126 # CHECK-BE: vspltw 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x8c]
127 # CHECK-LE: vspltw 2, 3, 1 # encoding: [0x8c,0x1a,0x41,0x10]
128 vspltw 2, 3, 1
/external/boringssl/linux-ppc64le/crypto/fipsmodule/
Daesp8-ppc.S183 vspltw 6,1,3
213 vspltw 6,1,3
270 vspltw 3,1,3
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s126 # CHECK-BE: vspltw 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x8c]
127 # CHECK-LE: vspltw 2, 3, 1 # encoding: [0x8c,0x1a,0x41,0x10]
128 vspltw 2, 3, 1
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DREADME_ALTIVEC.txt135 vspltw v2, v2, 0
DPPCInstrAltivec.td707 "vspltw $vD, $vB, $UIMM", IIC_VecPerm,
/external/llvm/lib/Target/PowerPC/
DREADME_ALTIVEC.txt135 vspltw v2, v2, 0
DPPCInstrAltivec.td706 "vspltw $vD, $vB, $UIMM", IIC_VecPerm,
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2245 __ vspltw(dst, dst, Operand(1)); in AssembleArchInstruction() local
2266 __ vspltw(dst, dst, Operand(1)); in AssembleArchInstruction() local
2970 __ vspltw(kScratchDoubleReg, kScratchDoubleReg, Operand(1)); in AssembleArchInstruction() local
3105 __ vspltw(kScratchDoubleReg, kScratchDoubleReg, Operand(1)); in AssembleArchInstruction() local
3115 __ vspltw(kScratchDoubleReg, kScratchDoubleReg, Operand(1)); in AssembleArchInstruction() local
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt114 # CHECK: vspltw 2, 3, 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt114 # CHECK: vspltw 2, 3, 1
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2213 V(vspltw, VSPLTW, 0x1000028C) \
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4356 "slw\006vspltb\006vsplth\010vspltisb\010vspltish\010vspltisw\006vspltw\003"
6653 …{ 11896 /* vspltw */, PPC::VSPLTW, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, 0, { MCK_RegVRRC, MC…