/external/llvm/test/CodeGen/PowerPC/ |
D | pr24216.ll | 14 ; CHECK-NOT: vspltw
|
D | vec_splat.ll | 5 ; RUN: grep vspltw %t | count 2
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | pr24216.ll | 14 ; CHECK-NOT: vspltw
|
D | vec_splat.ll | 5 ; RUN: grep vspltw %t | count 2
|
D | f128-vecExtractNconv.ll | 171 ; CHECK-NEXT: vspltw v2, v2, 3 178 ; CHECK-BE: vspltw v2, v2, 0 194 ; CHECK-NEXT: vspltw v2, v2, 2 222 ; CHECK-BE: vspltw v2, v2, 2 238 ; CHECK-NEXT: vspltw v2, v2, 0 245 ; CHECK-BE: vspltw v2, v2, 3
|
/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-vmx.s.cs | 37 0x10,0x41,0x1a,0x8c = vspltw 2, 3, 1
|
/external/boringssl/linux-ppc64le/crypto/aes/ |
D | aesp8-ppc.S | 169 vspltw 6,1,3 199 vspltw 6,1,3 256 vspltw 3,1,3
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-vmx.s | 126 # CHECK-BE: vspltw 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x8c] 127 # CHECK-LE: vspltw 2, 3, 1 # encoding: [0x8c,0x1a,0x41,0x10] 128 vspltw 2, 3, 1
|
/external/boringssl/linux-ppc64le/crypto/fipsmodule/ |
D | aesp8-ppc.S | 183 vspltw 6,1,3 213 vspltw 6,1,3 270 vspltw 3,1,3
|
/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-vmx.s | 126 # CHECK-BE: vspltw 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x8c] 127 # CHECK-LE: vspltw 2, 3, 1 # encoding: [0x8c,0x1a,0x41,0x10] 128 vspltw 2, 3, 1
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | README_ALTIVEC.txt | 135 vspltw v2, v2, 0
|
D | PPCInstrAltivec.td | 707 "vspltw $vD, $vB, $UIMM", IIC_VecPerm,
|
/external/llvm/lib/Target/PowerPC/ |
D | README_ALTIVEC.txt | 135 vspltw v2, v2, 0
|
D | PPCInstrAltivec.td | 706 "vspltw $vD, $vB, $UIMM", IIC_VecPerm,
|
/external/v8/src/compiler/backend/ppc/ |
D | code-generator-ppc.cc | 2245 __ vspltw(dst, dst, Operand(1)); in AssembleArchInstruction() local 2266 __ vspltw(dst, dst, Operand(1)); in AssembleArchInstruction() local 2970 __ vspltw(kScratchDoubleReg, kScratchDoubleReg, Operand(1)); in AssembleArchInstruction() local 3105 __ vspltw(kScratchDoubleReg, kScratchDoubleReg, Operand(1)); in AssembleArchInstruction() local 3115 __ vspltw(kScratchDoubleReg, kScratchDoubleReg, Operand(1)); in AssembleArchInstruction() local
|
/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 114 # CHECK: vspltw 2, 3, 1
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-vmx.txt | 114 # CHECK: vspltw 2, 3, 1
|
/external/v8/src/codegen/ppc/ |
D | constants-ppc.h | 2213 V(vspltw, VSPLTW, 0x1000028C) \
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenAsmMatcher.inc | 4356 "slw\006vspltb\006vsplth\010vspltisb\010vspltish\010vspltisw\006vspltw\003" 6653 …{ 11896 /* vspltw */, PPC::VSPLTW, Convert__RegVRRC1_0__U5Imm1_2__RegVRRC1_1, 0, { MCK_RegVRRC, MC…
|