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Searched refs:vsubuhm (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
D2008-07-10-SplatMiscompile.ll2 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubuhm
Dvaddsplat.ll112 ; CHECK: vsubuhm {{[0-9]+}}, [[REG1]], [[REG2]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
D2008-07-10-SplatMiscompile.ll2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vsubuhm
Dvaddsplat.ll112 ; CHECK: vsubuhm {{[0-9]+}}, [[REG1]], [[REG2]]
Dppc64-P9-vabsd.ll55 ; CHECK-PWR8: vsubuhm
335 ; CHECK-PWR8: vsubuhm
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs63 0x10,0x43,0x24,0x40 = vsubuhm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s274 # CHECK-BE: vsubuhm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x40]
275 # CHECK-LE: vsubuhm 2, 3, 4 # encoding: [0x40,0x24,0x43,0x10]
276 vsubuhm 2, 3, 4
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s274 # CHECK-BE: vsubuhm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x40]
275 # CHECK-LE: vsubuhm 2, 3, 4 # encoding: [0x40,0x24,0x43,0x10]
276 vsubuhm 2, 3, 4
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt243 # CHECK: vsubuhm 2, 3, 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt243 # CHECK: vsubuhm 2, 3, 4
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2261 V(vsubuhm, VSUBUHM, 0x10000440) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc2514 __ vsubuhm(i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() local
3005 __ vsubuhm(i.OutputSimd128Register(), tempFPReg1, kScratchDoubleReg); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td650 "vsubuhm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td651 "vsubuhm $vD, $vA, $vB", IIC_VecGeneral,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4360 "vsubuhm\007vsubuhs\007vsubuqm\007vsubuwm\007vsubuws\010vsum2sws\010vsum"
6676 …{ 12050 /* vsubuhm */, PPC::VSUBUHM, Convert__RegVRRC1_0__RegVRRC1_1__RegVRRC1_2, 0, { MCK_RegVRRC…