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Searched refs:vupklsh (Results 1 – 17 of 17) sorted by relevance

/external/capstone/suite/MC/PowerPC/
Dppc64-encoding-vmx.s.cs28 0x10,0x40,0x1a,0xce = vupklsh 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s91 # CHECK-BE: vupklsh 2, 3 # encoding: [0x10,0x40,0x1a,0xce]
92 # CHECK-LE: vupklsh 2, 3 # encoding: [0xce,0x1a,0x40,0x10]
93 vupklsh 2, 3
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s91 # CHECK-BE: vupklsh 2, 3 # encoding: [0x10,0x40,0x1a,0xce]
92 # CHECK-LE: vupklsh 2, 3 # encoding: [0xce,0x1a,0x40,0x10]
93 vupklsh 2, 3
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt81 # CHECK: vupklsh 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt81 # CHECK: vupklsh 2, 3
/external/v8/src/codegen/ppc/
Dconstants-ppc.h2377 V(vupklsh, VUPKLSH, 0x100002CE) \
/external/v8/src/compiler/backend/ppc/
Dcode-generator-ppc.cc3093 __ vupklsh(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
3101 __ vupklsh(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td766 def VUPKLSH : VX2_Int_Ty2<718, "vupklsh", int_ppc_altivec_vupklsh,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td773 def VUPKLSH : VX2_Int_Ty2<718, "vupklsh", int_ppc_altivec_vupklsh,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/
DPPCGenAsmMatcher.inc4362 "h\007vupkhsw\007vupklpx\007vupklsb\007vupklsh\007vupklsw\004vxor\004wai"
6692 …{ 12182 /* vupklsh */, PPC::VUPKLSH, Convert__RegVRRC1_0__RegVRRC1_1, 0, { MCK_RegVRRC, MCK_RegVRR…
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/
DIntrinsicEnums.inc4946 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
DIntrinsicImpl.inc4972 "llvm.ppc.altivec.vupklsh",
13850 1, // llvm.ppc.altivec.vupklsh
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen4002 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
10026 "llvm.ppc.altivec.vupklsh",
17911 1, // llvm.ppc.altivec.vupklsh
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen4008 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
10066 "llvm.ppc.altivec.vupklsh",
18006 1, // llvm.ppc.altivec.vupklsh
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen4008 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
10066 "llvm.ppc.altivec.vupklsh",
18006 1, // llvm.ppc.altivec.vupklsh
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen4008 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
10066 "llvm.ppc.altivec.vupklsh",
18006 1, // llvm.ppc.altivec.vupklsh
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen4008 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh
10066 "llvm.ppc.altivec.vupklsh",
18006 1, // llvm.ppc.altivec.vupklsh