| /external/arm-trusted-firmware/drivers/imx/uart/ |
| D | imx_uart.c | 55 static void write_reg(uintptr_t base, uint32_t offset, uint32_t val) in write_reg() function
72 write_reg(base_addr, IMX_UART_CR2_OFFSET, 0); in console_imx_uart_core_init()
78 write_reg(base_addr, IMX_UART_CR1_OFFSET, IMX_UART_CR1_UARTEN); in console_imx_uart_core_init()
83 write_reg(base_addr, IMX_UART_CR2_OFFSET, val); in console_imx_uart_core_init()
87 write_reg(base_addr, IMX_UART_CR3_OFFSET, val); in console_imx_uart_core_init()
90 write_reg(base_addr, IMX_UART_CR4_OFFSET, 0x8000); in console_imx_uart_core_init()
99 write_reg(base_addr, IMX_UART_FCR_OFFSET, val); in console_imx_uart_core_init()
115 write_reg(base_addr, IMX_UART_BIR_OFFSET, 0x0f); in console_imx_uart_core_init()
117 write_reg(base_addr, IMX_UART_BMR_OFFSET, val); in console_imx_uart_core_init()
140 write_reg(base_addr, IMX_UART_TXD_OFFSET, c); in console_imx_uart_core_putc()
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| /external/igt-gpu-tools/tools/ |
| D | intel_display_poller.c | 87 static void write_reg(uint32_t reg, uint32_t val) in write_reg() function
165 write_reg(iir, iir_mask | iir_bit); in poll_pixel_pipestat()
177 write_reg(iir, iir_mask | iir_bit); in poll_pixel_pipestat()
202 write_reg(IER, ier_save & ~bit); in poll_pixel_iir_gen3()
203 write_reg(IMR, imr_save & ~bit); in poll_pixel_iir_gen3()
205 write_reg(IIR, bit); in poll_pixel_iir_gen3()
216 write_reg(IIR, bit); in poll_pixel_iir_gen3()
230 write_reg(IMR, imr_save); in poll_pixel_iir_gen3()
231 write_reg(IER, ier_save); in poll_pixel_iir_gen3()
280 write_reg(surf, saved+256); in poll_pixel_pan()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | msr-it-block.ll | 14 br i1 %cmp, label %write_reg, label %exit
16 write_reg:
35 br i1 %cmp, label %write_reg, label %exit
37 write_reg:
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| /external/llvm/test/CodeGen/ARM/ |
| D | msr-it-block.ll | 14 br i1 %cmp, label %write_reg, label %exit
16 write_reg:
35 br i1 %cmp, label %write_reg, label %exit
37 write_reg:
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| /external/u-boot/board/gdsys/common/ |
| D | ihs_mdio.c | 38 static inline void write_reg(struct udevice *fpga, uint base, uint addr, in write_reg() function
67 write_reg(info->fpga, info->base, REG_MDIO_CONTROL, val); in write_control()
76 write_reg(info->fpga, info->base, REG_MDIO_ADDR_DATA, val); in write_addr_data()
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| /external/libiio/src/tests/ |
| D | iio_reg.c | 24 static int write_reg(const char *name, unsigned long addr, unsigned long val) in write_reg() function
109 return write_reg(argv[1], addr, val); in main()
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| /external/tensorflow/tensorflow/lite/micro/examples/person_detection/arduino/ |
| D | image_provider.cc | 76 myCAM.write_reg(0x07, 0x80); in InitCamera()
78 myCAM.write_reg(0x07, 0x00); in InitCamera()
81 myCAM.write_reg(ARDUCHIP_TEST1, 0x55); in InitCamera()
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| /external/tensorflow/tensorflow/lite/micro/examples/person_detection_experimental/arduino/ |
| D | image_provider.cc | 76 myCAM.write_reg(0x07, 0x80); in InitCamera()
78 myCAM.write_reg(0x07, 0x00); in InitCamera()
81 myCAM.write_reg(ARDUCHIP_TEST1, 0x55); in InitCamera()
|
| /external/crosvm/devices/src/ |
| D | ioapic.rs | 335 fn write_reg(ioapic: &mut Ioapic, selector: u8, value: u32) { in write_reg() function
356 write_reg( in write_entry()
361 write_reg( in write_entry()
404 write_reg(&mut ioapic, IOAPIC_REG_VERSION, data_write); in write_read_ioaic_reg_version()
413 write_reg(&mut ioapic, IOAPIC_REG_ID, 0x1f3e5d7c); in write_read_ioapic_reg_id()
426 write_reg(&mut ioapic, IOAPIC_REG_ID, data_write_id); in write_read_ioapic_arbitration_id()
435 write_reg(&mut ioapic, IOAPIC_REG_ARBITRATION_ID, !data_write_id); in write_read_ioapic_arbitration_id()
|
| /external/u-boot/drivers/mtd/spi/ |
| D | spi-nor-core.c | 207 return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1); in write_sr()
216 return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0); in write_enable()
224 return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0); in write_disable()
328 status = nor->write_reg(nor, cmd, NULL, 0); in set_4byte()
342 nor->write_reg(nor, SPINOR_OP_WREAR, nor->cmd_buf, 1); in set_4byte()
350 return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1); in set_4byte()
367 nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0); in spi_nor_sr_ready()
391 nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); in spi_nor_fsr_ready()
463 return nor->write_reg(nor, cmd, &bank_sel, 1); in clean_bar()
477 ret = nor->write_reg(nor, cmd, &bank_sel, 1); in write_bar()
[all …]
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| /external/mesa3d/src/broadcom/simulator/ |
| D | v3d_simulator_wrapper.cpp | 71 hw->write_reg(reg, val); in v3d_hw_write_reg()
|
| /external/tensorflow/tensorflow/lite/micro/examples/magic_wand/sparkfun_edge/ |
| D | accelerometer_handler.cc | 113 dev_ctx.write_reg = lis2dh12_write_platform_apollo3; // write bytes function in SetupAccelerometer()
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| /external/crosvm/devices/src/pci/ |
| D | pci_device.rs | 135 4 => regs.write_reg(reg_idx, LittleEndian::read_u32(data)), in config_register_write()
|
| D | pci_configuration.rs | 290 pub fn write_reg(&mut self, reg_idx: usize, value: u32) { in write_reg() method
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| /external/u-boot/drivers/spi/ |
| D | ich.c | 75 static void write_reg(struct ich_spi_priv *priv, const void *value, in write_reg() function
434 write_reg(ctlr, trans->out, ctlr->data, data_length); in ich_spi_exec_op()
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| /external/u-boot/include/linux/mtd/ |
| D | spi-nor.h | 323 int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len); member
|
| /external/u-boot/include/ |
| D | dw_hdmi.h | 548 void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset); member
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| /external/u-boot/drivers/video/ |
| D | dw_hdmi.c | 1025 if (hdmi->write_reg) in dw_hdmi_init()
1026 hdmi_write = hdmi->write_reg; in dw_hdmi_init()
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| /external/u-boot/drivers/video/meson/ |
| D | meson_dw_hdmi.c | 399 priv->hdmi.write_reg = dw_hdmi_dwc_write; in meson_dw_hdmi_probe()
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| /external/u-boot/arch/arm/mach-omap2/ |
| D | emif-common.c | 1490 ((bug_00339_regs[i].write_reg - 1) << 1)); in do_bug0039_workaround()
1493 (bug_00339_regs[i].write_reg << 1) - 1); in do_bug0039_workaround()
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| /external/u-boot/arch/arm/include/asm/ |
| D | emif.h | 1253 u32 write_reg; member
|